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scsi: ufs: qcom: Provide default cycles_in_1us value
The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro
clock, which results in miscalculation of the cycles_in_1us value. Provide
the backwards-compatible default to support existing MSM8996 DT files.
Fixes: b4e13e1ae9
("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES")
Cc: Nitin Rawat <quic_nitirawa@quicinc.com>
Cc: stable@vger.kernel.org # 6.7.x
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240218-msm8996-fix-ufs-v3-1-40aab49899a3@linaro.org
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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parent
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81e2c1a0f8
@ -1210,8 +1210,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up)
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list_for_each_entry(clki, head, list) {
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if (!IS_ERR_OR_NULL(clki->clk) &&
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!strcmp(clki->name, "core_clk_unipro")) {
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if (is_scale_up)
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!strcmp(clki->name, "core_clk_unipro")) {
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if (!clki->max_freq)
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cycles_in_1us = 150; /* default for backwards compatibility */
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else if (is_scale_up)
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cycles_in_1us = ceil(clki->max_freq, (1000 * 1000));
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else
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cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000));
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