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ALSA: wss_lib: use CS4231P instead of AD1848P (kill the AD1848P)
Use CS4231P instead of AD1848P (kill the AD1848P). Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Reviewed-by: Rene Herman <rene.herman@gmail.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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0c5e3e9822
commit
811585e9d1
@ -27,15 +27,6 @@
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#include "wss.h" /* temporary till the driver is removed */
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/* IO ports */
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#define AD1848P( chip, x ) ( (chip) -> port + c_d_c_AD1848##x )
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#define c_d_c_AD1848REGSEL 0
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#define c_d_c_AD1848REG 1
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#define c_d_c_AD1848STATUS 2
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#define c_d_c_AD1848PIO 3
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/* codec registers */
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#define AD1848_LEFT_INPUT 0x00 /* left input control */
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@ -103,7 +103,7 @@ static void snd_ad1848_wait(struct snd_wss *chip)
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int timeout;
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for (timeout = 250; timeout > 0; timeout--) {
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if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
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if ((inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) == 0)
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break;
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udelay(100);
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}
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@ -115,12 +115,12 @@ void snd_ad1848_out(struct snd_wss *chip,
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{
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snd_ad1848_wait(chip);
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#ifdef CONFIG_SND_DEBUG
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if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
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if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT)
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snd_printk(KERN_WARNING "auto calibration time out - "
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"reg = 0x%x, value = 0x%x\n", reg, value);
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#endif
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outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
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outb(chip->image[reg] = value, AD1848P(chip, REG));
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outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL));
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outb(chip->image[reg] = value, chip->port + CS4231P(REG));
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mb();
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snd_printdd("codec out - reg 0x%x = 0x%x\n",
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chip->mce_bit | reg, value);
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@ -132,8 +132,8 @@ static void snd_ad1848_dout(struct snd_wss *chip,
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unsigned char reg, unsigned char value)
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{
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snd_ad1848_wait(chip);
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outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
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outb(value, AD1848P(chip, REG));
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outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL));
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outb(value, chip->port + CS4231P(REG));
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mb();
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}
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@ -141,37 +141,37 @@ static unsigned char snd_ad1848_in(struct snd_wss *chip, unsigned char reg)
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{
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snd_ad1848_wait(chip);
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#ifdef CONFIG_SND_DEBUG
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if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
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if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT)
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snd_printk(KERN_WARNING "auto calibration time out - "
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"reg = 0x%x\n", reg);
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#endif
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outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
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outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL));
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mb();
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return inb(AD1848P(chip, REG));
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return inb(chip->port + CS4231P(REG));
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}
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#if 0
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static void snd_ad1848_debug(struct snd_wss *chip)
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{
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printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
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printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
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printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
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printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
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printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
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printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
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printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
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printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
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printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
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printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
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printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
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printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
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printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
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printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
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printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
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printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
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printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
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printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
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printk(KERN_DEBUG "AD1848 REGS: INDEX = 0x%02x ", inb(chip->port + CS4231P(REGSEL)));
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printk(KERN_DEBUG " STATUS = 0x%02x\n", inb(chip->port + CS4231P(STATUS)));
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printk(KERN_DEBUG " 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
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printk(KERN_DEBUG " 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
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printk(KERN_DEBUG " 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
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printk(KERN_DEBUG " 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
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printk(KERN_DEBUG " 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
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printk(KERN_DEBUG " 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
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printk(KERN_DEBUG " 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
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printk(KERN_DEBUG " 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
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printk(KERN_DEBUG " 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
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printk(KERN_DEBUG " 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
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printk(KERN_DEBUG " 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
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printk(KERN_DEBUG " 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
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printk(KERN_DEBUG " 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
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printk(KERN_DEBUG " 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
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printk(KERN_DEBUG " 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
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printk(KERN_DEBUG " 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
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}
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#endif
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@ -187,16 +187,17 @@ static void snd_ad1848_mce_up(struct snd_wss *chip)
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snd_ad1848_wait(chip);
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#ifdef CONFIG_SND_DEBUG
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if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
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if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT)
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snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
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#endif
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spin_lock_irqsave(&chip->reg_lock, flags);
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chip->mce_bit |= AD1848_MCE;
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timeout = inb(AD1848P(chip, REGSEL));
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timeout = inb(chip->port + CS4231P(REGSEL));
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if (timeout == 0x80)
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snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
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if (!(timeout & AD1848_MCE))
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outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
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outb(chip->mce_bit | (timeout & 0x1f),
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chip->port + CS4231P(REGSEL));
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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}
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@ -207,21 +208,25 @@ static void snd_ad1848_mce_down(struct snd_wss *chip)
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spin_lock_irqsave(&chip->reg_lock, flags);
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for (timeout = 5; timeout > 0; timeout--)
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inb(AD1848P(chip, REGSEL));
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inb(chip->port + CS4231P(REGSEL));
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/* end of cleanup sequence */
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for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
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for (timeout = 12000;
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timeout > 0 && (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT);
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timeout--)
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udelay(100);
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snd_printdd("(1) timeout = %ld\n", timeout);
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#ifdef CONFIG_SND_DEBUG
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if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
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snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
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if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT)
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snd_printk(KERN_WARNING
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"mce_down [0x%lx] - auto calibration time out (0)\n",
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chip->port + CS4231P(REGSEL));
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#endif
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chip->mce_bit &= ~AD1848_MCE;
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reg = inb(AD1848P(chip, REGSEL));
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outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
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reg = inb(chip->port + CS4231P(REGSEL));
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outb(chip->mce_bit | (reg & 0x1f), chip->port + CS4231P(REGSEL));
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if (reg == 0x80)
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snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
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if ((reg & AD1848_MCE) == 0) {
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@ -252,7 +257,8 @@ static void snd_ad1848_mce_down(struct snd_wss *chip)
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"mce_down - auto calibration time out (2)\n");
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snd_printdd("(4) jiffies = %lu\n", jiffies);
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snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
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snd_printd("mce_down - exit = 0x%x\n",
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inb(chip->port + CS4231P(REGSEL)));
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}
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static unsigned int snd_ad1848_get_count(unsigned char format,
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@ -412,8 +418,8 @@ static int snd_ad1848_open(struct snd_wss *chip, unsigned int mode)
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/* ok. now enable and ack CODEC IRQ */
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spin_lock_irqsave(&chip->reg_lock, flags);
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
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snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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@ -431,8 +437,8 @@ static void snd_ad1848_close(struct snd_wss *chip)
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return;
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/* disable IRQ */
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spin_lock_irqsave(&chip->reg_lock, flags);
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
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snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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@ -449,8 +455,8 @@ static void snd_ad1848_close(struct snd_wss *chip)
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/* clear IRQ again */
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spin_lock_irqsave(&chip->reg_lock, flags);
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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chip->mode = 0;
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@ -572,7 +578,7 @@ static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
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snd_pcm_period_elapsed(chip->playback_substream);
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if ((chip->mode & WSS_MODE_RECORD) && chip->capture_substream)
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snd_pcm_period_elapsed(chip->capture_substream);
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outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
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outb(0, chip->port + CS4231P(STATUS)); /* clear global interrupt bit */
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return IRQ_HANDLED;
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}
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@ -638,8 +644,8 @@ static void snd_ad1848_resume(struct snd_wss *chip)
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snd_ad1848_thinkpad_twiddle(chip, 1);
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/* clear any pendings IRQ */
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inb(AD1848P(chip, STATUS));
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outb(0, AD1848P(chip, STATUS));
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inb(chip->port + CS4231P(STATUS));
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outb(0, chip->port + CS4231P(STATUS));
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mb();
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snd_ad1848_mce_down(chip);
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@ -662,7 +668,7 @@ static int snd_ad1848_probe(struct snd_wss *chip)
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id = ad1847 = 0;
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for (i = 0; i < 1000; i++) {
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mb();
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if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
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if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT)
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udelay(500);
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else {
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spin_lock_irqsave(&chip->reg_lock, flags);
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@ -707,8 +713,8 @@ static int snd_ad1848_probe(struct snd_wss *chip)
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}
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}
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spin_lock_irqsave(&chip->reg_lock, flags);
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inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
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outb(0, AD1848P(chip, STATUS));
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inb(chip->port + CS4231P(STATUS)); /* clear any pendings IRQ */
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outb(0, chip->port + CS4231P(STATUS));
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mb();
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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