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drm/i915/selftests: Prepare the selftests for engine resets with ring submission
The engine resets selftests kick the tasklets, safe up until now as only execlists supported engine resets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119110802.22228-2-chris@chris-wilson.co.uk
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e627d5923c
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@ -704,6 +704,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
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for_each_engine(engine, gt, id) {
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unsigned int reset_count, reset_engine_count;
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unsigned long count;
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IGT_TIMEOUT(end_time);
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if (active && !intel_engine_can_store_dword(engine))
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@ -721,6 +722,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
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st_engine_heartbeat_disable(engine);
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set_bit(I915_RESET_ENGINE + id, >->reset.flags);
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count = 0;
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do {
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if (active) {
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struct i915_request *rq;
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@ -770,9 +772,13 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
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err = -EINVAL;
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break;
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}
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count++;
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} while (time_before(jiffies, end_time));
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clear_bit(I915_RESET_ENGINE + id, >->reset.flags);
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st_engine_heartbeat_enable(engine);
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pr_info("%s: Completed %lu %s resets\n",
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engine->name, count, active ? "active" : "idle");
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if (err)
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break;
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@ -1623,7 +1629,8 @@ static int igt_reset_queue(void *arg)
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prev = rq;
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count++;
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} while (time_before(jiffies, end_time));
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pr_info("%s: Completed %d resets\n", engine->name, count);
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pr_info("%s: Completed %d queued resets\n",
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engine->name, count);
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*h.batch = MI_BATCH_BUFFER_END;
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intel_gt_chipset_flush(engine->gt);
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@ -1720,7 +1727,8 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
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GEM_TRACE("i915_reset_engine(%s:%s) under %s\n",
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engine->name, mode, p->name);
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tasklet_disable(t);
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if (t->func)
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tasklet_disable(t);
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if (strcmp(p->name, "softirq"))
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local_bh_disable();
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p->critical_section_begin();
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@ -1730,8 +1738,10 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
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p->critical_section_end();
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if (strcmp(p->name, "softirq"))
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local_bh_enable();
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tasklet_enable(t);
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tasklet_hi_schedule(t);
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if (t->func) {
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tasklet_enable(t);
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tasklet_hi_schedule(t);
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}
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if (err)
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pr_err("i915_reset_engine(%s:%s) failed under %s\n",
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@ -321,7 +321,10 @@ static int igt_atomic_engine_reset(void *arg)
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goto out_unlock;
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for_each_engine(engine, gt, id) {
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tasklet_disable(&engine->execlists.tasklet);
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struct tasklet_struct *t = &engine->execlists.tasklet;
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if (t->func)
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tasklet_disable(t);
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intel_engine_pm_get(engine);
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for (p = igt_atomic_phases; p->name; p++) {
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@ -345,8 +348,10 @@ static int igt_atomic_engine_reset(void *arg)
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}
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intel_engine_pm_put(engine);
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tasklet_enable(&engine->execlists.tasklet);
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tasklet_hi_schedule(&engine->execlists.tasklet);
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if (t->func) {
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tasklet_enable(t);
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tasklet_hi_schedule(t);
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}
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if (err)
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break;
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}
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