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dmaengine: PL08x: ignore 'direction' argument in dma_slave_config
Ignore the direction argument in dma_slave_config, and configure both directions independently. We still check that the configuration for the intended direction is valid; this check will eventually be dropped. This check is just for debugging at present. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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9862ba17b7
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@ -218,8 +218,6 @@ enum pl08x_dma_chan_state {
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* @name: name of channel
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* @cd: channel platform data
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* @runtime_addr: address for RX/TX according to the runtime config
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* @runtime_direction: current direction of this channel according to
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* runtime config
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* @pend_list: queued transactions pending on this channel
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* @at: active transaction on this channel
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* @lock: a lock for this channel data
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@ -239,7 +237,6 @@ struct pl08x_dma_chan {
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struct dma_slave_config cfg;
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u32 src_cctl;
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u32 dst_cctl;
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enum dma_transfer_direction runtime_direction;
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struct list_head pend_list;
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struct pl08x_txd *at;
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spinlock_t lock;
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@ -1239,50 +1236,31 @@ static int dma_set_runtime_config(struct dma_chan *chan,
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{
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struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
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struct pl08x_driver_data *pl08x = plchan->host;
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enum dma_slave_buswidth addr_width;
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u32 maxburst, cctl = 0;
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u32 src_cctl, dst_cctl;
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if (!plchan->slave)
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return -EINVAL;
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/* Transfer direction */
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plchan->runtime_direction = config->direction;
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if (config->direction == DMA_MEM_TO_DEV) {
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addr_width = config->dst_addr_width;
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maxburst = config->dst_maxburst;
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} else if (config->direction == DMA_DEV_TO_MEM) {
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addr_width = config->src_addr_width;
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maxburst = config->src_maxburst;
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} else {
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dst_cctl = pl08x_get_cctl(plchan, config->dst_addr_width,
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config->dst_maxburst);
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if (dst_cctl == ~0 && config->direction == DMA_MEM_TO_DEV) {
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dev_err(&pl08x->adev->dev,
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"bad runtime_config: alien transfer direction\n");
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"bad runtime_config: alien address width (M2D)\n");
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return -EINVAL;
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}
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cctl = pl08x_get_cctl(plchan, addr_width, maxburst);
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if (cctl == ~0) {
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src_cctl = pl08x_get_cctl(plchan, config->src_addr_width,
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config->src_maxburst);
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if (src_cctl == ~0 && config->direction == DMA_DEV_TO_MEM) {
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dev_err(&pl08x->adev->dev,
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"bad runtime_config: alien address width\n");
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"bad runtime_config: alien address width (D2M)\n");
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return -EINVAL;
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}
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plchan->dst_cctl = dst_cctl;
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plchan->src_cctl = src_cctl;
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plchan->cfg = *config;
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if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
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plchan->src_cctl = cctl;
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} else {
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plchan->dst_cctl = cctl;
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}
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dev_dbg(&pl08x->adev->dev,
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"configured channel %s (%s) for %s, data width %d, "
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"maxburst %d words, LE, CCTL=0x%08x\n",
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dma_chan_name(chan), plchan->name,
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(config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX",
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addr_width,
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maxburst,
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cctl);
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return 0;
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}
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@ -1470,11 +1448,6 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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return NULL;
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}
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if (direction != plchan->runtime_direction)
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dev_err(&pl08x->adev->dev, "%s DMA setup does not match "
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"the direction configured for the PrimeCell\n",
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__func__);
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/*
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* Set up addresses, the PrimeCell configured address
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* will take precedence since this may configure the
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@ -1499,6 +1472,13 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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return NULL;
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}
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if (cctl == ~0) {
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pl08x_free_txd(pl08x, txd);
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dev_err(&pl08x->adev->dev,
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"DMA slave configuration botched?\n");
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return NULL;
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}
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txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);
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if (plchan->cfg.device_fc)
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