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nds32: DMA mapping API
This patch adds support for the DMA mapping API. It uses dma_map_ops for flexibility. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Greentime Hu
parent
4a64f68dbd
commit
80081b3391
14
arch/nds32/include/asm/dma-mapping.h
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14
arch/nds32/include/asm/dma-mapping.h
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@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef ASMNDS32_DMA_MAPPING_H
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#define ASMNDS32_DMA_MAPPING_H
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extern struct dma_map_ops nds32_dma_ops;
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static inline struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &nds32_dma_ops;
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}
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#endif
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477
arch/nds32/kernel/dma.c
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477
arch/nds32/kernel/dma.c
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@ -0,0 +1,477 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/cache.h>
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#include <linux/highmem.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/dma-mapping.h>
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#include <asm/proc-fns.h>
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/*
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* This is the page table (2MB) covering uncached, DMA consistent allocations
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*/
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static pte_t *consistent_pte;
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static DEFINE_RAW_SPINLOCK(consistent_lock);
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enum master_type {
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FOR_CPU = 0,
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FOR_DEVICE = 1,
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};
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/*
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* VM region handling support.
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*
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* This should become something generic, handling VM region allocations for
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* vmalloc and similar (ioremap, module space, etc).
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*
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* I envisage vmalloc()'s supporting vm_struct becoming:
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*
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* struct vm_struct {
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* struct vm_region region;
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* unsigned long flags;
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* struct page **pages;
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* unsigned int nr_pages;
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* unsigned long phys_addr;
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* };
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*
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* get_vm_area() would then call vm_region_alloc with an appropriate
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* struct vm_region head (eg):
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*
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* struct vm_region vmalloc_head = {
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* .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
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* .vm_start = VMALLOC_START,
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* .vm_end = VMALLOC_END,
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* };
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*
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* However, vmalloc_head.vm_start is variable (typically, it is dependent on
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* the amount of RAM found at boot time.) I would imagine that get_vm_area()
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* would have to initialise this each time prior to calling vm_region_alloc().
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*/
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struct arch_vm_region {
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struct list_head vm_list;
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unsigned long vm_start;
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unsigned long vm_end;
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struct page *vm_pages;
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};
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static struct arch_vm_region consistent_head = {
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.vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
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.vm_start = CONSISTENT_BASE,
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.vm_end = CONSISTENT_END,
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};
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static struct arch_vm_region *vm_region_alloc(struct arch_vm_region *head,
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size_t size, int gfp)
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{
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unsigned long addr = head->vm_start, end = head->vm_end - size;
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unsigned long flags;
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struct arch_vm_region *c, *new;
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new = kmalloc(sizeof(struct arch_vm_region), gfp);
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if (!new)
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goto out;
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raw_spin_lock_irqsave(&consistent_lock, flags);
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list_for_each_entry(c, &head->vm_list, vm_list) {
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if ((addr + size) < addr)
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goto nospc;
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if ((addr + size) <= c->vm_start)
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goto found;
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addr = c->vm_end;
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if (addr > end)
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goto nospc;
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}
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found:
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/*
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* Insert this entry _before_ the one we found.
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*/
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list_add_tail(&new->vm_list, &c->vm_list);
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new->vm_start = addr;
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new->vm_end = addr + size;
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raw_spin_unlock_irqrestore(&consistent_lock, flags);
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return new;
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nospc:
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raw_spin_unlock_irqrestore(&consistent_lock, flags);
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kfree(new);
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out:
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return NULL;
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}
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static struct arch_vm_region *vm_region_find(struct arch_vm_region *head,
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unsigned long addr)
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{
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struct arch_vm_region *c;
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list_for_each_entry(c, &head->vm_list, vm_list) {
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if (c->vm_start == addr)
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goto out;
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}
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c = NULL;
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out:
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return c;
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}
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/* FIXME: attrs is not used. */
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static void *nds32_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t * handle, gfp_t gfp,
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unsigned long attrs)
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{
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struct page *page;
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struct arch_vm_region *c;
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unsigned long order;
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u64 mask = ~0ULL, limit;
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pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
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if (!consistent_pte) {
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pr_err("%s: not initialized\n", __func__);
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dump_stack();
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return NULL;
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}
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if (dev) {
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mask = dev->coherent_dma_mask;
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/*
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* Sanity check the DMA mask - it must be non-zero, and
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* must be able to be satisfied by a DMA allocation.
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*/
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if (mask == 0) {
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dev_warn(dev, "coherent DMA mask is unset\n");
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goto no_page;
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}
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}
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/*
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* Sanity check the allocation size.
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*/
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size = PAGE_ALIGN(size);
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limit = (mask + 1) & ~mask;
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if ((limit && size >= limit) ||
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size >= (CONSISTENT_END - CONSISTENT_BASE)) {
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pr_warn("coherent allocation too big "
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"(requested %#x mask %#llx)\n", size, mask);
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goto no_page;
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}
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order = get_order(size);
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if (mask != 0xffffffff)
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gfp |= GFP_DMA;
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page = alloc_pages(gfp, order);
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if (!page)
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goto no_page;
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/*
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* Invalidate any data that might be lurking in the
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* kernel direct-mapped region for device DMA.
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*/
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{
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unsigned long kaddr = (unsigned long)page_address(page);
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memset(page_address(page), 0, size);
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cpu_dma_wbinval_range(kaddr, kaddr + size);
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}
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/*
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* Allocate a virtual address in the consistent mapping region.
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*/
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c = vm_region_alloc(&consistent_head, size,
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gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
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if (c) {
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pte_t *pte = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
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struct page *end = page + (1 << order);
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c->vm_pages = page;
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/*
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* Set the "dma handle"
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*/
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*handle = page_to_phys(page);
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do {
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BUG_ON(!pte_none(*pte));
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/*
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* x86 does not mark the pages reserved...
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*/
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SetPageReserved(page);
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set_pte(pte, mk_pte(page, prot));
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page++;
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pte++;
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} while (size -= PAGE_SIZE);
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/*
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* Free the otherwise unused pages.
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*/
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while (page < end) {
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__free_page(page);
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page++;
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}
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return (void *)c->vm_start;
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}
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if (page)
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__free_pages(page, order);
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no_page:
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*handle = ~0;
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return NULL;
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}
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static void nds32_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, unsigned long attrs)
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{
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struct arch_vm_region *c;
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unsigned long flags, addr;
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pte_t *ptep;
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size = PAGE_ALIGN(size);
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raw_spin_lock_irqsave(&consistent_lock, flags);
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c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
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if (!c)
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goto no_area;
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if ((c->vm_end - c->vm_start) != size) {
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pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
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__func__, c->vm_end - c->vm_start, size);
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dump_stack();
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size = c->vm_end - c->vm_start;
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}
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ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
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addr = c->vm_start;
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do {
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pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
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unsigned long pfn;
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ptep++;
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addr += PAGE_SIZE;
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if (!pte_none(pte) && pte_present(pte)) {
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pfn = pte_pfn(pte);
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if (pfn_valid(pfn)) {
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struct page *page = pfn_to_page(pfn);
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/*
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* x86 does not mark the pages reserved...
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*/
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ClearPageReserved(page);
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__free_page(page);
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continue;
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}
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}
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pr_crit("%s: bad page in kernel page table\n", __func__);
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} while (size -= PAGE_SIZE);
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flush_tlb_kernel_range(c->vm_start, c->vm_end);
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list_del(&c->vm_list);
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raw_spin_unlock_irqrestore(&consistent_lock, flags);
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kfree(c);
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return;
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no_area:
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raw_spin_unlock_irqrestore(&consistent_lock, flags);
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pr_err("%s: trying to free invalid coherent area: %p\n",
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__func__, cpu_addr);
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dump_stack();
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}
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/*
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* Initialise the consistent memory allocation.
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*/
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static int __init consistent_init(void)
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{
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pgd_t *pgd;
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pmd_t *pmd;
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pte_t *pte;
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int ret = 0;
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do {
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pgd = pgd_offset(&init_mm, CONSISTENT_BASE);
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pmd = pmd_alloc(&init_mm, pgd, CONSISTENT_BASE);
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if (!pmd) {
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pr_err("%s: no pmd tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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/* The first level mapping may be created in somewhere.
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* It's not necessary to warn here. */
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/* WARN_ON(!pmd_none(*pmd)); */
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pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
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if (!pte) {
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ret = -ENOMEM;
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break;
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}
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consistent_pte = pte;
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} while (0);
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return ret;
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}
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core_initcall(consistent_init);
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static void consistent_sync(void *vaddr, size_t size, int direction, int master_type);
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static dma_addr_t nds32_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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consistent_sync((void *)(page_address(page) + offset), size, dir, FOR_DEVICE);
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return page_to_phys(page) + offset;
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}
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static void nds32_dma_unmap_page(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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consistent_sync(phys_to_virt(handle), size, dir, FOR_CPU);
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}
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/*
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* Make an area consistent for devices.
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*/
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static void consistent_sync(void *vaddr, size_t size, int direction, int master_type)
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{
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unsigned long start = (unsigned long)vaddr;
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unsigned long end = start + size;
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if (master_type == FOR_CPU) {
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switch (direction) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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cpu_dma_inval_range(start, end);
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break;
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default:
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BUG();
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}
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} else {
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/* FOR_DEVICE */
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switch (direction) {
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case DMA_FROM_DEVICE:
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break;
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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cpu_dma_wb_range(start, end);
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break;
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default:
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BUG();
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}
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}
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}
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static int nds32_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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void *virt;
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unsigned long pfn;
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struct page *page = sg_page(sg);
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sg->dma_address = sg_phys(sg);
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pfn = page_to_pfn(page) + sg->offset / PAGE_SIZE;
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page = pfn_to_page(pfn);
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if (PageHighMem(page)) {
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virt = kmap_atomic(page);
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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kunmap_atomic(virt);
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} else {
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if (sg->offset > PAGE_SIZE)
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panic("sg->offset:%08x > PAGE_SIZE\n",
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sg->offset);
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virt = page_address(page) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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}
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}
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return nents;
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}
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static void nds32_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction dir,
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unsigned long attrs)
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{
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}
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static void
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nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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consistent_sync((void *)phys_to_virt(handle), size, dir, FOR_CPU);
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}
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static void
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nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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consistent_sync((void *)phys_to_virt(handle), size, dir, FOR_DEVICE);
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}
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static void
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nds32_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt =
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page_address((struct page *)sg->page_link) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_CPU);
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}
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}
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static void
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nds32_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt =
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page_address((struct page *)sg->page_link) + sg->offset;
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consistent_sync(virt, sg->length, dir, FOR_DEVICE);
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}
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}
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struct dma_map_ops nds32_dma_ops = {
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.alloc = nds32_dma_alloc_coherent,
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.free = nds32_dma_free,
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.map_page = nds32_dma_map_page,
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.unmap_page = nds32_dma_unmap_page,
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.map_sg = nds32_dma_map_sg,
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.unmap_sg = nds32_dma_unmap_sg,
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.sync_single_for_device = nds32_dma_sync_single_for_device,
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.sync_single_for_cpu = nds32_dma_sync_single_for_cpu,
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.sync_sg_for_cpu = nds32_dma_sync_sg_for_cpu,
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.sync_sg_for_device = nds32_dma_sync_sg_for_device,
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};
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EXPORT_SYMBOL(nds32_dma_ops);
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