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gpio: lynxpoint: Convert to use gpiolib irqchip
Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Mika Westerberg
Linus Walleij
parent
0a6d315827
commit
7f87210eff
@ -430,7 +430,7 @@ config GPIO_GE_FPGA
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config GPIO_LYNXPOINT
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tristate "Intel Lynxpoint GPIO support"
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depends on ACPI && X86
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select IRQ_DOMAIN
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select GPIOLIB_IRQCHIP
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help
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driver for GPIO functionality on Intel Lynxpoint PCH chipset
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Requires ACPI device enumeration code to set up a platform device.
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@ -25,9 +25,7 @@
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/irqdomain.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/platform_device.h>
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@ -62,7 +60,6 @@
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struct lp_gpio {
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struct gpio_chip chip;
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struct irq_domain *domain;
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struct platform_device *pdev;
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spinlock_t lock;
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unsigned long reg_base;
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@ -151,7 +148,8 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset)
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static int lp_irq_type(struct irq_data *d, unsigned type)
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{
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struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
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u32 hwirq = irqd_to_hwirq(d);
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unsigned long flags;
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u32 value;
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@ -236,16 +234,11 @@ static int lp_gpio_direction_output(struct gpio_chip *chip,
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return 0;
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}
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static int lp_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
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return irq_create_mapping(lg->domain, offset);
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}
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static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct lp_gpio *lg = irq_data_get_irq_handler_data(data);
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struct gpio_chip *gc = irq_desc_get_handler_data(desc);
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struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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u32 base, pin, mask;
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unsigned long reg, ena, pending;
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@ -262,7 +255,7 @@ static void lp_gpio_irq_handler(unsigned hwirq, struct irq_desc *desc)
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mask = BIT(pin);
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/* Clear before handling so we don't lose an edge */
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outl(mask, reg);
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irq = irq_find_mapping(lg->domain, base + pin);
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irq = irq_find_mapping(lg->chip.irqdomain, base + pin);
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generic_handle_irq(irq);
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}
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}
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@ -279,7 +272,8 @@ static void lp_irq_mask(struct irq_data *d)
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static void lp_irq_enable(struct irq_data *d)
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{
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struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
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u32 hwirq = irqd_to_hwirq(d);
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unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
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unsigned long flags;
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@ -291,7 +285,8 @@ static void lp_irq_enable(struct irq_data *d)
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static void lp_irq_disable(struct irq_data *d)
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{
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struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct lp_gpio *lg = container_of(gc, struct lp_gpio, chip);
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u32 hwirq = irqd_to_hwirq(d);
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unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
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unsigned long flags;
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@ -301,26 +296,6 @@ static void lp_irq_disable(struct irq_data *d)
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spin_unlock_irqrestore(&lg->lock, flags);
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}
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static int lp_irq_reqres(struct irq_data *d)
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{
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struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
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if (gpio_lock_as_irq(&lg->chip, irqd_to_hwirq(d))) {
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dev_err(lg->chip.dev,
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"unable to lock HW IRQ %lu for IRQ\n",
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irqd_to_hwirq(d));
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return -EINVAL;
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}
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return 0;
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}
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static void lp_irq_relres(struct irq_data *d)
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{
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struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
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gpio_unlock_as_irq(&lg->chip, irqd_to_hwirq(d));
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}
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static struct irq_chip lp_irqchip = {
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.name = "LP-GPIO",
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.irq_mask = lp_irq_mask,
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@ -328,8 +303,6 @@ static struct irq_chip lp_irqchip = {
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.irq_enable = lp_irq_enable,
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.irq_disable = lp_irq_disable,
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.irq_set_type = lp_irq_type,
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.irq_request_resources = lp_irq_reqres,
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.irq_release_resources = lp_irq_relres,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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@ -348,22 +321,6 @@ static void lp_gpio_irq_init_hw(struct lp_gpio *lg)
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}
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}
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static int lp_gpio_irq_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct lp_gpio *lg = d->host_data;
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irq_set_chip_and_handler(irq, &lp_irqchip, handle_simple_irq);
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irq_set_chip_data(irq, lg);
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irq_set_irq_type(irq, IRQ_TYPE_NONE);
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return 0;
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}
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static const struct irq_domain_ops lp_gpio_irq_ops = {
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.map = lp_gpio_irq_map,
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};
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static int lp_gpio_probe(struct platform_device *pdev)
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{
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struct lp_gpio *lg;
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@ -371,7 +328,6 @@ static int lp_gpio_probe(struct platform_device *pdev)
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struct resource *io_rc, *irq_rc;
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struct device *dev = &pdev->dev;
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unsigned long reg_len;
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unsigned hwirq;
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int ret = -ENODEV;
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lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL);
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@ -414,27 +370,28 @@ static int lp_gpio_probe(struct platform_device *pdev)
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gc->can_sleep = false;
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gc->dev = dev;
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/* set up interrupts */
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if (irq_rc && irq_rc->start) {
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hwirq = irq_rc->start;
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gc->to_irq = lp_gpio_to_irq;
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lg->domain = irq_domain_add_linear(NULL, LP_NUM_GPIO,
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&lp_gpio_irq_ops, lg);
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if (!lg->domain)
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return -ENXIO;
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lp_gpio_irq_init_hw(lg);
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irq_set_handler_data(hwirq, lg);
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irq_set_chained_handler(hwirq, lp_gpio_irq_handler);
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}
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ret = gpiochip_add(gc);
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if (ret) {
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dev_err(dev, "failed adding lp-gpio chip\n");
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return ret;
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}
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/* set up interrupts */
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if (irq_rc && irq_rc->start) {
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lp_gpio_irq_init_hw(lg);
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ret = gpiochip_irqchip_add(gc, &lp_irqchip, 0,
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handle_simple_irq, IRQ_TYPE_NONE);
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if (ret) {
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dev_err(dev, "failed to add irqchip\n");
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gpiochip_remove(gc);
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return ret;
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}
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gpiochip_set_chained_irqchip(gc, &lp_irqchip,
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(unsigned)irq_rc->start,
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lp_gpio_irq_handler);
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}
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pm_runtime_enable(dev);
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return 0;
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