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clk: ingenic: Add support for clocks whose gate bit is inverted

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Support the clocks which are gated when their gate bit is cleared
instead of set.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Paul Cercueil 2018-05-20 16:31:12 +00:00 committed by Stephen Boyd
parent 60cc43fc88
commit 7ef3844fc5
2 changed files with 5 additions and 2 deletions
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5
drivers/clk/ingenic/cgu.c
View File

@ -43,7 +43,8 @@ static inline bool
ingenic_cgu_gate_get(struct ingenic_cgu *cgu,
const struct ingenic_cgu_gate_info *info)
{
return readl(cgu->base + info->reg) & BIT(info->bit);
return !!(readl(cgu->base + info->reg) & BIT(info->bit))
^ info->clear_to_gate;
}
/**
@ -62,7 +63,7 @@ ingenic_cgu_gate_set(struct ingenic_cgu *cgu,
{
u32 clkgr = readl(cgu->base + info->reg);
if (val)
if (val ^ info->clear_to_gate)
clkgr |= BIT(info->bit);
else
clkgr &= ~BIT(info->bit);

2
drivers/clk/ingenic/cgu.h
View File

@ -111,10 +111,12 @@ struct ingenic_cgu_fixdiv_info {
* struct ingenic_cgu_gate_info - information about a clock gate
* @reg: offset of the gate control register within the CGU
* @bit: offset of the bit in the register that controls the gate
* @clear_to_gate: if set, the clock is gated when the bit is cleared
*/
struct ingenic_cgu_gate_info {
unsigned reg;
u8 bit;
bool clear_to_gate;
};
/**