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net/mlx5: E-Switch, Use metadata matching for RoCE loopback rule
Use metadata matching for RoCE loopback rule if device is configured to use metadata for source port matching. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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c24246d07a
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@ -683,6 +683,14 @@ mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr
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struct mlx5_flow_handle *
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esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
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void mlx5_esw_set_flow_group_source_port(struct mlx5_eswitch *esw,
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u32 *flow_group_in,
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int match_params);
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void mlx5_esw_set_spec_source_port(struct mlx5_eswitch *esw,
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u16 vport,
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struct mlx5_flow_spec *spec);
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int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
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void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
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@ -1293,9 +1293,10 @@ esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
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#define MAX_PF_SQ 256
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#define MAX_SQ_NVPORTS 32
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static void esw_set_flow_group_source_port(struct mlx5_eswitch *esw,
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u32 *flow_group_in,
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int match_params)
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void
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mlx5_esw_set_flow_group_source_port(struct mlx5_eswitch *esw,
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u32 *flow_group_in,
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int match_params)
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{
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void *match_criteria = MLX5_ADDR_OF(create_flow_group_in,
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flow_group_in,
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@ -1488,7 +1489,7 @@ esw_create_send_to_vport_group(struct mlx5_eswitch *esw,
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memset(flow_group_in, 0, inlen);
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esw_set_flow_group_source_port(esw, flow_group_in, MLX5_MATCH_MISC_PARAMETERS);
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mlx5_esw_set_flow_group_source_port(esw, flow_group_in, MLX5_MATCH_MISC_PARAMETERS);
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match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
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MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_sqn);
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@ -1582,7 +1583,7 @@ esw_create_peer_esw_miss_group(struct mlx5_eswitch *esw,
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memset(flow_group_in, 0, inlen);
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esw_set_flow_group_source_port(esw, flow_group_in, 0);
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mlx5_esw_set_flow_group_source_port(esw, flow_group_in, 0);
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if (!mlx5_eswitch_vport_match_metadata_enabled(esw)) {
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match_criteria = MLX5_ADDR_OF(create_flow_group_in,
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@ -1869,7 +1870,7 @@ static int esw_create_vport_rx_group(struct mlx5_eswitch *esw)
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return -ENOMEM;
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/* create vport rx group */
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esw_set_flow_group_source_port(esw, flow_group_in, 0);
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mlx5_esw_set_flow_group_source_port(esw, flow_group_in, 0);
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MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
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MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, nvports - 1);
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@ -1939,21 +1940,13 @@ static void esw_destroy_vport_rx_drop_group(struct mlx5_eswitch *esw)
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mlx5_destroy_flow_group(esw->offloads.vport_rx_drop_group);
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}
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struct mlx5_flow_handle *
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mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
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struct mlx5_flow_destination *dest)
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void
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mlx5_esw_set_spec_source_port(struct mlx5_eswitch *esw,
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u16 vport,
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struct mlx5_flow_spec *spec)
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{
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struct mlx5_flow_act flow_act = {0};
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struct mlx5_flow_handle *flow_rule;
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struct mlx5_flow_spec *spec;
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void *misc;
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spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
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if (!spec) {
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flow_rule = ERR_PTR(-ENOMEM);
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goto out;
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}
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if (mlx5_eswitch_vport_match_metadata_enabled(esw)) {
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misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2);
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MLX5_SET(fte_match_set_misc2, misc, metadata_reg_c_0,
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@ -1973,6 +1966,23 @@ mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
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spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
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}
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}
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struct mlx5_flow_handle *
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mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
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struct mlx5_flow_destination *dest)
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{
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struct mlx5_flow_act flow_act = {0};
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struct mlx5_flow_handle *flow_rule;
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struct mlx5_flow_spec *spec;
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spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
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if (!spec) {
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flow_rule = ERR_PTR(-ENOMEM);
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goto out;
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}
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mlx5_esw_set_spec_source_port(esw, vport, spec);
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flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
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flow_rule = mlx5_add_flow_rules(esw->offloads.ft_offloads, spec,
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@ -30,9 +30,8 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev)
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struct mlx5_flow_spec *spec;
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struct mlx5_flow_table *ft;
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struct mlx5_flow_group *fg;
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void *match_criteria;
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struct mlx5_eswitch *esw;
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u32 *flow_group_in;
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void *misc;
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int err;
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if (!(MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support) &&
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@ -63,12 +62,8 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev)
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goto free;
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}
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MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
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MLX5_MATCH_MISC_PARAMETERS);
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match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in,
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match_criteria);
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MLX5_SET_TO_ONES(fte_match_param, match_criteria,
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misc_parameters.source_port);
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esw = dev->priv.eswitch;
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mlx5_esw_set_flow_group_source_port(esw, flow_group_in, 0);
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fg = mlx5_create_flow_group(ft, flow_group_in);
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if (IS_ERR(fg)) {
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@ -77,14 +72,7 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev)
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goto destroy_flow_table;
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}
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spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
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misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
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misc_parameters);
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MLX5_SET(fte_match_set_misc, misc, source_port,
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dev->priv.eswitch->manager_vport);
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misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
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misc_parameters);
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MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
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mlx5_esw_set_spec_source_port(esw, esw->manager_vport, spec);
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flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
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flow_rule = mlx5_add_flow_rules(ft, spec, &flow_act, NULL, 0);
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