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net: stmmac: use correct PPS capture input index

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The stmmac supports up to 4 auxiliary snapshots that can be enabled by
setting the appropriate bits in the PTP_ACR bitfield.

Previously as of commit f4da56529d ("net: stmmac: Add support for
external trigger timestamping") instead of setting the bits, a fixed
value was written to this bitfield instead of passing the appropriate
bitmask.

Now the correct bit is set according to the ptp_clock_request.extts_index
passed as a parameter to stmmac_enable().

Signed-off-by: Johannes Zink <j.zink@pengutronix.de>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Johannes Zink 2023-10-18 09:09:54 +02:00 committed by Paolo Abeni
parent 3fba823439
commit 7e62ac24b5
2 changed files with 3 additions and 4 deletions
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5
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
View File

@ -201,12 +201,11 @@ static int stmmac_enable(struct ptp_clock_info *ptp,
acr_value &= ~PTP_ACR_MASK; acr_value &= ~PTP_ACR_MASK;
if (on) { if (on) {
/* Enable External snapshot trigger */ /* Enable External snapshot trigger */
acr_value |= priv->plat->ext_snapshot_num; acr_value |= PTP_ACR_ATSEN(rq->extts.index);
acr_value |= PTP_ACR_ATSFC; acr_value |= PTP_ACR_ATSFC;
} }
netdev_dbg(priv->dev, "Auxiliary Snapshot %d %s.\n", netdev_dbg(priv->dev, "Auxiliary Snapshot %d %s.\n",
priv->plat->ext_snapshot_num >> PTP_ACR_ATSEN_SHIFT, rq->extts.index, on ? "enabled" : "disabled");
on ? "enabled" : "disabled");
writel(acr_value, ptpaddr + PTP_ACR); writel(acr_value, ptpaddr + PTP_ACR);
mutex_unlock(&priv->aux_ts_lock); mutex_unlock(&priv->aux_ts_lock);
/* wait for auxts fifo clear to finish */ /* wait for auxts fifo clear to finish */

2
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
View File

@ -79,7 +79,7 @@
#define PTP_ACR_ATSEN1 BIT(5) /* Auxiliary Snapshot 1 Enable */ #define PTP_ACR_ATSEN1 BIT(5) /* Auxiliary Snapshot 1 Enable */
#define PTP_ACR_ATSEN2 BIT(6) /* Auxiliary Snapshot 2 Enable */ #define PTP_ACR_ATSEN2 BIT(6) /* Auxiliary Snapshot 2 Enable */
#define PTP_ACR_ATSEN3 BIT(7) /* Auxiliary Snapshot 3 Enable */ #define PTP_ACR_ATSEN3 BIT(7) /* Auxiliary Snapshot 3 Enable */
#define PTP_ACR_ATSEN_SHIFT 5 /* Auxiliary Snapshot shift */ #define PTP_ACR_ATSEN(index) (PTP_ACR_ATSEN0 << (index))
#define PTP_ACR_MASK GENMASK(7, 4) /* Aux Snapshot Mask */ #define PTP_ACR_MASK GENMASK(7, 4) /* Aux Snapshot Mask */
#define PMC_ART_VALUE0 0x01 /* PMC_ART[15:0] timer value */ #define PMC_ART_VALUE0 0x01 /* PMC_ART[15:0] timer value */
#define PMC_ART_VALUE1 0x02 /* PMC_ART[31:16] timer value */ #define PMC_ART_VALUE1 0x02 /* PMC_ART[31:16] timer value */