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Merge branches 'pm-cpufreq' and 'pm-sleep'
* pm-cpufreq: cpufreq: cpufreq-dt: Restore default cpumask_setall(policy->cpus) cpufreq: cpufreq-dt: disable unsupported OPPs * pm-sleep: PM / Sleep: fix recovery during resuming from hibernation PM / Sleep: fix async suspend_late/freeze_late error handling
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commit
7d627280b3
@ -1266,6 +1266,8 @@ int dpm_suspend_late(pm_message_t state)
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}
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mutex_unlock(&dpm_list_mtx);
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async_synchronize_full();
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if (!error)
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error = async_error;
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if (error) {
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suspend_stats.failed_suspend_late++;
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dpm_save_failed_step(SUSPEND_SUSPEND_LATE);
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@ -187,6 +187,7 @@ static int cpufreq_init(struct cpufreq_policy *policy)
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struct device *cpu_dev;
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struct regulator *cpu_reg;
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struct clk *cpu_clk;
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unsigned long min_uV = ~0, max_uV = 0;
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unsigned int transition_latency;
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int ret;
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@ -206,16 +207,10 @@ static int cpufreq_init(struct cpufreq_policy *policy)
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/* OPPs might be populated at runtime, don't check for error here */
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of_init_opp_table(cpu_dev);
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
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goto out_put_node;
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}
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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goto out_free_table;
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goto out_put_node;
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}
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of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
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@ -224,30 +219,51 @@ static int cpufreq_init(struct cpufreq_policy *policy)
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transition_latency = CPUFREQ_ETERNAL;
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if (!IS_ERR(cpu_reg)) {
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struct dev_pm_opp *opp;
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unsigned long min_uV, max_uV;
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int i;
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unsigned long opp_freq = 0;
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/*
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* OPP is maintained in order of increasing frequency, and
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* freq_table initialised from OPP is therefore sorted in the
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* same order.
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* Disable any OPPs where the connected regulator isn't able to
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* provide the specified voltage and record minimum and maximum
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* voltage levels.
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*/
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for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
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;
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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freq_table[0].frequency * 1000, true);
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min_uV = dev_pm_opp_get_voltage(opp);
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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freq_table[i-1].frequency * 1000, true);
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max_uV = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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while (1) {
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struct dev_pm_opp *opp;
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unsigned long opp_uV, tol_uV;
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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break;
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}
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opp_uV = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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tol_uV = opp_uV * priv->voltage_tolerance / 100;
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if (regulator_is_supported_voltage(cpu_reg, opp_uV,
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opp_uV + tol_uV)) {
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if (opp_uV < min_uV)
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min_uV = opp_uV;
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if (opp_uV > max_uV)
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max_uV = opp_uV;
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} else {
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dev_pm_opp_disable(cpu_dev, opp_freq);
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}
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opp_freq++;
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}
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ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
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if (ret > 0)
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transition_latency += ret * 1000;
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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pr_err("failed to init cpufreq table: %d\n", ret);
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goto out_free_priv;
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}
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/*
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* For now, just loading the cooling device;
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* thermal DT code takes care of matching them.
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@ -277,7 +293,7 @@ static int cpufreq_init(struct cpufreq_policy *policy)
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policy->cpuinfo.transition_latency = transition_latency;
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pd = cpufreq_get_driver_data();
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if (pd && !pd->independent_clocks)
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if (!pd || !pd->independent_clocks)
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cpumask_setall(policy->cpus);
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of_node_put(np);
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@ -286,9 +302,9 @@ static int cpufreq_init(struct cpufreq_policy *policy)
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out_cooling_unregister:
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cpufreq_cooling_unregister(priv->cdev);
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kfree(priv);
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out_free_table:
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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out_free_priv:
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kfree(priv);
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out_put_node:
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of_node_put(np);
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out_put_reg_clk:
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@ -502,8 +502,14 @@ int hibernation_restore(int platform_mode)
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error = dpm_suspend_start(PMSG_QUIESCE);
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if (!error) {
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error = resume_target_kernel(platform_mode);
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dpm_resume_end(PMSG_RECOVER);
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/*
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* The above should either succeed and jump to the new kernel,
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* or return with an error. Otherwise things are just
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* undefined, so let's be paranoid.
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*/
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BUG_ON(!error);
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}
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dpm_resume_end(PMSG_RECOVER);
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pm_restore_gfp_mask();
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resume_console();
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pm_restore_console();
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