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mtd: maps: ixp4xx: Drop driver
This custom maps driver was never used with the device tree
enabled IXP4xx systems, which use the physmap add-on from
commit 2aba2f2a70
("mtd: physmap_of: add a hook for Intel IXP4xx flash probing")
Since kernel v5.18-rc1 IXP4xx is only booting from the device
tree so drop this old driver.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220407210844.2489682-1-linus.walleij@linaro.org
This commit is contained in:
Linus Walleij
Miquel Raynal
parent
4c38eded80
commit
7ceeb60119
@ -300,15 +300,6 @@ config MTD_DC21285
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21285 bridge used with Intel's StrongARM processors. More info at
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<https://www.intel.com/design/bridge/docs/21285_documentation.htm>.
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config MTD_IXP4XX
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tristate "CFI Flash device mapped on Intel IXP4xx based systems"
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depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX && MTD_CFI_ADV_OPTIONS
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help
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This enables MTD access to flash devices on platforms based
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on Intel's IXP4xx family of network processors such as the
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IXDP425 and Coyote. If you have an IXP4xx based board and
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would like to use the flash chips on it, say 'Y'.
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config MTD_IMPA7
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tristate "JEDEC Flash device mapped on impA7"
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depends on ARM && MTD_JEDECPROBE
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@ -39,7 +39,6 @@ obj-$(CONFIG_MTD_IMPA7) += impa7.o
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obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
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obj-$(CONFIG_MTD_NETtel) += nettel.o
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obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
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obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
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obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
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obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
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obj-$(CONFIG_MTD_VMU) += vmu-flash.o
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@ -1,262 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/mtd/maps/ixp4xx.c
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*
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* MTD Map file for IXP4XX based systems. Please do not make per-board
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* changes in here. If your board needs special setup, do it in your
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* platform level code in arch/arm/mach-ixp4xx/board-setup.c
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*
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* Original Author: Intel Corporation
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* Maintainer: Deepak Saxena <dsaxena@mvista.com>
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*
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* Copyright (C) 2002 Intel Corporation
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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*/
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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#include <asm/mach/flash.h>
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#include <linux/reboot.h>
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/*
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* Read/write a 16 bit word from flash address 'addr'.
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*
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* When the cpu is in little-endian mode it swizzles the address lines
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* ('address coherency') so we need to undo the swizzling to ensure commands
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* and the like end up on the correct flash address.
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*
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* To further complicate matters, due to the way the expansion bus controller
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* handles 32 bit reads, the byte stream ABCD is stored on the flash as:
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* D15 D0
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* +---+---+
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* | A | B | 0
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* +---+---+
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* | C | D | 2
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* +---+---+
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* This means that on LE systems each 16 bit word must be swapped. Note that
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* this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
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* data and other flash commands which are always in D7-D0.
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*/
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#ifndef __ARMEB__
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#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
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# error CONFIG_MTD_CFI_BE_BYTE_SWAP required
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#endif
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static inline u16 flash_read16(void __iomem *addr)
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{
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return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
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}
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static inline void flash_write16(u16 d, void __iomem *addr)
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{
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__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
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}
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#define BYTE0(h) ((h) & 0xFF)
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#define BYTE1(h) (((h) >> 8) & 0xFF)
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#else
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static inline u16 flash_read16(const void __iomem *addr)
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{
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return __raw_readw(addr);
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}
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static inline void flash_write16(u16 d, void __iomem *addr)
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{
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__raw_writew(d, addr);
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}
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#define BYTE0(h) (((h) >> 8) & 0xFF)
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#define BYTE1(h) ((h) & 0xFF)
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#endif
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static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
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{
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map_word val;
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val.x[0] = flash_read16(map->virt + ofs);
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return val;
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}
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/*
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* The IXP4xx expansion bus only allows 16-bit wide acceses
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* when attached to a 16-bit wide device (such as the 28F128J3A),
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* so we can't just memcpy_fromio().
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*/
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static void ixp4xx_copy_from(struct map_info *map, void *to,
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unsigned long from, ssize_t len)
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{
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u8 *dest = (u8 *) to;
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void __iomem *src = map->virt + from;
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if (len <= 0)
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return;
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if (from & 1) {
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*dest++ = BYTE1(flash_read16(src-1));
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src++;
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--len;
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}
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while (len >= 2) {
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u16 data = flash_read16(src);
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*dest++ = BYTE0(data);
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*dest++ = BYTE1(data);
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src += 2;
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len -= 2;
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}
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if (len > 0)
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*dest++ = BYTE0(flash_read16(src));
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}
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/*
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* Unaligned writes are ignored, causing the 8-bit
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* probe to fail and proceed to the 16-bit probe (which succeeds).
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*/
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static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
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{
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if (!(adr & 1))
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flash_write16(d.x[0], map->virt + adr);
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}
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/*
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* Fast write16 function without the probing check above
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*/
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static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
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{
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flash_write16(d.x[0], map->virt + adr);
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}
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struct ixp4xx_flash_info {
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struct mtd_info *mtd;
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struct map_info map;
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struct resource *res;
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};
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static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL };
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static int ixp4xx_flash_remove(struct platform_device *dev)
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{
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struct flash_platform_data *plat = dev_get_platdata(&dev->dev);
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struct ixp4xx_flash_info *info = platform_get_drvdata(dev);
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if(!info)
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return 0;
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if (info->mtd) {
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mtd_device_unregister(info->mtd);
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map_destroy(info->mtd);
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}
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if (plat->exit)
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plat->exit();
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return 0;
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}
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static int ixp4xx_flash_probe(struct platform_device *dev)
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{
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struct flash_platform_data *plat = dev_get_platdata(&dev->dev);
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struct ixp4xx_flash_info *info;
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struct mtd_part_parser_data ppdata = {
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.origin = dev->resource->start,
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};
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int err = -1;
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if (!plat)
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return -ENODEV;
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if (plat->init) {
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err = plat->init();
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if (err)
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return err;
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}
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info = devm_kzalloc(&dev->dev, sizeof(struct ixp4xx_flash_info),
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GFP_KERNEL);
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if(!info) {
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err = -ENOMEM;
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goto Error;
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}
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platform_set_drvdata(dev, info);
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/*
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* Tell the MTD layer we're not 1:1 mapped so that it does
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* not attempt to do a direct access on us.
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*/
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info->map.phys = NO_XIP;
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info->map.size = resource_size(dev->resource);
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/*
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* We only support 16-bit accesses for now. If and when
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* any board use 8-bit access, we'll fixup the driver to
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* handle that.
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*/
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info->map.bankwidth = 2;
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info->map.name = dev_name(&dev->dev);
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info->map.read = ixp4xx_read16;
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info->map.write = ixp4xx_probe_write16;
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info->map.copy_from = ixp4xx_copy_from;
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info->map.virt = devm_ioremap_resource(&dev->dev, dev->resource);
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if (IS_ERR(info->map.virt)) {
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err = PTR_ERR(info->map.virt);
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goto Error;
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}
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info->mtd = do_map_probe(plat->map_name, &info->map);
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if (!info->mtd) {
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printk(KERN_ERR "IXP4XXFlash: map_probe failed\n");
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err = -ENXIO;
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goto Error;
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}
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info->mtd->dev.parent = &dev->dev;
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/* Use the fast version */
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info->map.write = ixp4xx_write16;
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err = mtd_device_parse_register(info->mtd, probes, &ppdata,
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plat->parts, plat->nr_parts);
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if (err) {
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printk(KERN_ERR "Could not parse partitions\n");
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goto Error;
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}
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return 0;
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Error:
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ixp4xx_flash_remove(dev);
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return err;
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}
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static struct platform_driver ixp4xx_flash_driver = {
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.probe = ixp4xx_flash_probe,
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.remove = ixp4xx_flash_remove,
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.driver = {
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.name = "IXP4XX-Flash",
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},
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};
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module_platform_driver(ixp4xx_flash_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("MTD map driver for Intel IXP4xx systems");
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MODULE_AUTHOR("Deepak Saxena");
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MODULE_ALIAS("platform:IXP4XX-Flash");
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