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tools/testing/cxl: Enumerate mock decoders
Enumerate 2-decoders per switch port and endpoint in the cxl_test topology. Link: https://lore.kernel.org/r/164298432699.3018233.12131068635065601541.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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c1915142e8
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@ -14,6 +14,7 @@
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#define NR_CXL_HOST_BRIDGES 2
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#define NR_CXL_ROOT_PORTS 2
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#define NR_CXL_SWITCH_PORTS 2
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#define NR_CXL_PORT_DECODERS 2
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static struct platform_device *cxl_acpi;
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static struct platform_device *cxl_host_bridge[NR_CXL_HOST_BRIDGES];
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@ -406,38 +407,115 @@ static int mock_cxl_add_passthrough_decoder(struct cxl_port *port)
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return -EOPNOTSUPP;
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}
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struct target_map_ctx {
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int *target_map;
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int index;
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int target_count;
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};
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static int map_targets(struct device *dev, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct target_map_ctx *ctx = data;
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ctx->target_map[ctx->index++] = pdev->id;
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if (ctx->index > ctx->target_count) {
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dev_WARN_ONCE(dev, 1, "too many targets found?\n");
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return -ENXIO;
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}
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return 0;
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}
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static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm)
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{
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struct cxl_port *port = cxlhdm->port;
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struct cxl_port *parent_port = to_cxl_port(port->dev.parent);
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int target_count, i;
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if (is_cxl_endpoint(port))
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target_count = 0;
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else if (is_cxl_root(parent_port))
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target_count = NR_CXL_ROOT_PORTS;
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else
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target_count = NR_CXL_SWITCH_PORTS;
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for (i = 0; i < NR_CXL_PORT_DECODERS; i++) {
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int target_map[CXL_DECODER_MAX_INTERLEAVE] = { 0 };
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struct target_map_ctx ctx = {
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.target_map = target_map,
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.target_count = target_count,
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};
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struct cxl_decoder *cxld;
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int rc;
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if (target_count)
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cxld = cxl_switch_decoder_alloc(port, target_count);
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else
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cxld = cxl_endpoint_decoder_alloc(port);
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if (IS_ERR(cxld)) {
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dev_warn(&port->dev,
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"Failed to allocate the decoder\n");
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return PTR_ERR(cxld);
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}
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cxld->decoder_range = (struct range) {
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.start = 0,
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.end = -1,
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};
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cxld->flags = CXL_DECODER_F_ENABLE;
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cxld->interleave_ways = min_not_zero(target_count, 1);
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cxld->interleave_granularity = SZ_4K;
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cxld->target_type = CXL_DECODER_EXPANDER;
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if (target_count) {
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rc = device_for_each_child(port->uport, &ctx,
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map_targets);
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if (rc) {
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put_device(&cxld->dev);
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return rc;
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}
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}
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rc = cxl_decoder_add_locked(cxld, target_map);
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if (rc) {
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put_device(&cxld->dev);
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dev_err(&port->dev, "Failed to add decoder\n");
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return rc;
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}
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rc = cxl_decoder_autoremove(&port->dev, cxld);
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if (rc)
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return rc;
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dev_dbg(&cxld->dev, "Added to port %s\n", dev_name(&port->dev));
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}
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return 0;
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}
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static int mock_cxl_port_enumerate_dports(struct cxl_port *port)
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{
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struct device *dev = &port->dev;
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int i;
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struct platform_device **array;
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int i, array_size;
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for (i = 0; i < ARRAY_SIZE(cxl_root_port); i++) {
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struct platform_device *pdev = cxl_root_port[i];
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struct cxl_dport *dport;
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if (pdev->dev.parent != port->uport)
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continue;
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dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id,
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CXL_RESOURCE_NONE);
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if (IS_ERR(dport)) {
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dev_err(dev, "failed to add dport: %s (%ld)\n",
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dev_name(&pdev->dev), PTR_ERR(dport));
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return PTR_ERR(dport);
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}
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dev_dbg(dev, "add dport%d: %s\n", pdev->id,
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dev_name(&pdev->dev));
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if (port->depth == 1) {
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array_size = ARRAY_SIZE(cxl_root_port);
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array = cxl_root_port;
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} else if (port->depth == 2) {
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array_size = ARRAY_SIZE(cxl_switch_dport);
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array = cxl_switch_dport;
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} else {
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dev_WARN_ONCE(&port->dev, 1, "unexpected depth %d\n",
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port->depth);
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return -ENXIO;
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}
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for (i = 0; i < ARRAY_SIZE(cxl_switch_dport); i++) {
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struct platform_device *pdev = cxl_switch_dport[i];
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for (i = 0; i < array_size; i++) {
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struct platform_device *pdev = array[i];
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struct cxl_dport *dport;
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if (pdev->dev.parent != port->uport)
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