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gpio: gpio-wcove: fix irq pending status bit width
Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO pins. But when checking for the pending status, for_each_set_bit() uses bit width of 7 and hence it only checks the status for first 7 GPIO pins missing to check/clear the status of rest of the GPIO pins. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -317,7 +317,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
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while (pending) {
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/* One iteration is for all pending bits */
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for_each_set_bit(gpio, (const unsigned long *)&pending,
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GROUP0_NR_IRQS) {
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WCOVE_GPIO_NUM) {
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offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
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mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
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BIT(gpio);
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