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ACPI: CPPC: Add AMD pstate energy performance preference cppc control
Add support for setting and querying EPP preferences to the generic CPPC driver. This enables downstream drivers such as amd-pstate to discover and use these values. Downstream drivers that want to use the new symbols cppc_get_epp_caps and cppc_set_epp_perf for querying and setting EPP preferences will need to call cppc_set_epp_perf to enable the EPP function firstly. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Wyes Karny <wyes.karny@amd.com> Tested-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -1153,6 +1153,19 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
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return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf);
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}
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/**
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* cppc_get_epp_perf - Get the epp register value.
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* @cpunum: CPU from which to get epp preference value.
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* @epp_perf: Return address.
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*
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* Return: 0 for success, -EIO otherwise.
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*/
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int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
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{
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return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf);
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}
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EXPORT_SYMBOL_GPL(cppc_get_epp_perf);
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/**
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* cppc_get_perf_caps - Get a CPU's performance capabilities.
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* @cpunum: CPU from which to get capabilities info.
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@ -1365,6 +1378,60 @@ out_err:
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}
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EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
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/*
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* Set Energy Performance Preference Register value through
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* Performance Controls Interface
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*/
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int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
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{
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int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
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struct cpc_register_resource *epp_set_reg;
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struct cpc_register_resource *auto_sel_reg;
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struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
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struct cppc_pcc_data *pcc_ss_data = NULL;
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int ret;
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if (!cpc_desc) {
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pr_debug("No CPC descriptor for CPU:%d\n", cpu);
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return -ENODEV;
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}
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auto_sel_reg = &cpc_desc->cpc_regs[AUTO_SEL_ENABLE];
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epp_set_reg = &cpc_desc->cpc_regs[ENERGY_PERF];
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if (CPC_IN_PCC(epp_set_reg) || CPC_IN_PCC(auto_sel_reg)) {
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if (pcc_ss_id < 0) {
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pr_debug("Invalid pcc_ss_id for CPU:%d\n", cpu);
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return -ENODEV;
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}
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if (CPC_SUPPORTED(auto_sel_reg)) {
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ret = cpc_write(cpu, auto_sel_reg, enable);
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if (ret)
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return ret;
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}
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if (CPC_SUPPORTED(epp_set_reg)) {
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ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf);
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if (ret)
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return ret;
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}
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pcc_ss_data = pcc_data[pcc_ss_id];
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down_write(&pcc_ss_data->pcc_lock);
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/* after writing CPC, transfer the ownership of PCC to platform */
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ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);
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up_write(&pcc_ss_data->pcc_lock);
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} else {
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ret = -ENOTSUPP;
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pr_debug("_CPC in PCC is not supported\n");
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}
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return ret;
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}
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EXPORT_SYMBOL_GPL(cppc_set_epp_perf);
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/**
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* cppc_set_enable - Set to enable CPPC on the processor by writing the
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* Continuous Performance Control package EnableRegister field.
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@ -108,12 +108,14 @@ struct cppc_perf_caps {
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u32 lowest_nonlinear_perf;
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u32 lowest_freq;
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u32 nominal_freq;
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u32 energy_perf;
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};
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struct cppc_perf_ctrls {
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u32 max_perf;
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u32 min_perf;
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u32 desired_perf;
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u32 energy_perf;
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};
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struct cppc_perf_fb_ctrs {
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@ -149,6 +151,8 @@ extern bool cpc_ffh_supported(void);
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extern bool cpc_supported_by_cpu(void);
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extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
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extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
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extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
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extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
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#else /* !CONFIG_ACPI_CPPC_LIB */
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static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
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{
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@ -202,6 +206,14 @@ static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
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{
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return -ENOTSUPP;
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}
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static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
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{
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return -ENOTSUPP;
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}
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static inline int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
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{
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return -ENOTSUPP;
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}
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#endif /* !CONFIG_ACPI_CPPC_LIB */
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#endif /* _CPPC_ACPI_H*/
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