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usb: dwc3: core: add support for disabling SS instances in park mode
In certain circumstances, the XHCI SuperSpeed instance in park mode can fail to recover, thus on Amlogic G12A/G12B/SM1 SoCs when there is high load on the single XHCI SuperSpeed instance, the controller can crash like: xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command. xhci-hcd xhci-hcd.0.auto: Host halt failed, -110 xhci-hcd xhci-hcd.0.auto: xHCI host controller not responding, assume dead xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command. hub 2-1.1:1.0: hub_ext_port_status failed (err = -22) xhci-hcd xhci-hcd.0.auto: HC died; cleaning up usb 2-1.1-port1: cannot reset (err = -22) Setting the PARKMODE_DISABLE_SS bit in the DWC3_USB3_GUCTL1 mitigates the issue. The bit is described as : "When this bit is set to '1' all SS bus instances in park mode are disabled" Synopsys explains: The GUCTL1.PARKMODE_DISABLE_SS is only available in dwc_usb3 controller running in host mode. This should not be set for other IPs. This can be disabled by default based on IP, but I recommend to have a property to enable this feature for devices that need this. CC: Dongjin Kim <tobetter@gmail.com> Cc: Jianxin Pan <jianxin.pan@amlogic.com> Cc: Thinh Nguyen <thinhn@synopsys.com> Cc: Jun Li <lijun.kernel@gmail.com> Reported-by: Tim <elatllat@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
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@ -1029,6 +1029,9 @@ static int dwc3_core_init(struct dwc3 *dwc)
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if (dwc->dis_tx_ipgap_linecheck_quirk)
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reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS;
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if (dwc->parkmode_disable_ss_quirk)
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reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS;
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dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
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}
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@ -1342,6 +1345,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
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"snps,dis-del-phy-power-chg-quirk");
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dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev,
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"snps,dis-tx-ipgap-linecheck-quirk");
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dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
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"snps,parkmode-disable-ss-quirk");
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dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
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"snps,tx_de_emphasis_quirk");
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@ -249,6 +249,7 @@
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#define DWC3_GUCTL_HSTINAUTORETRY BIT(14)
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/* Global User Control 1 Register */
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#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
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#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28)
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#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24)
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@ -1024,6 +1025,8 @@ struct dwc3_scratchpad_array {
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* change quirk.
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* @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate
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* check during HS transmit.
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* @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
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* instances in park mode.
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* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
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* @tx_de_emphasis: Tx de-emphasis value
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* 0 - -6dB de-emphasis
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@ -1215,6 +1218,7 @@ struct dwc3 {
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unsigned dis_u2_freeclk_exists_quirk:1;
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unsigned dis_del_phy_power_chg_quirk:1;
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unsigned dis_tx_ipgap_linecheck_quirk:1;
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unsigned parkmode_disable_ss_quirk:1;
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unsigned tx_de_emphasis_quirk:1;
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unsigned tx_de_emphasis:2;
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