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drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and dpu_format
Rewrite dpu_plane's QoS related functions to take struct dpu_sw_pipe and struct dpu_format as arguments rather than fetching them from the pstate or drm_framebuffer. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527339/ Link: https://lore.kernel.org/r/20230316161653.4106395-19-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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@ -129,19 +129,18 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
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/**
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* _dpu_plane_calc_bw - calculate bandwidth required for a plane
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* @plane: Pointer to drm plane.
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* @fb: Pointer to framebuffer associated with the given plane
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* @fmt: Pointer to source buffer format
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* @pipe_cfg: Pointer to pipe configuration
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* Result: Updates calculated bandwidth in the plane state.
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* BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
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* Prefill BW Equation: line src bytes * line_time
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*/
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static void _dpu_plane_calc_bw(struct drm_plane *plane,
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struct drm_framebuffer *fb,
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const struct dpu_format *fmt,
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struct dpu_sw_pipe_cfg *pipe_cfg)
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{
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struct dpu_plane_state *pstate;
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struct drm_display_mode *mode;
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const struct dpu_format *fmt = NULL;
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struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
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int src_width, src_height, dst_height, fps;
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u64 plane_prefill_bw;
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@ -153,8 +152,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane,
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pstate = to_dpu_plane_state(plane->state);
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mode = &plane->state->crtc->mode;
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fmt = dpu_get_dpu_format_ext(fb->format->format, fb->modifier);
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src_width = drm_rect_width(&pipe_cfg->src_rect);
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src_height = drm_rect_height(&pipe_cfg->src_rect);
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dst_height = drm_rect_height(&pipe_cfg->dst_rect);
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@ -218,25 +215,25 @@ static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_sw_pipe_cfg
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/**
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* _dpu_plane_calc_fill_level - calculate fill level of the given source format
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* @plane: Pointer to drm plane
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* @pipe: Pointer to software pipe
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* @fmt: Pointer to source buffer format
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* @src_width: width of source buffer
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* Return: fill level corresponding to the source buffer/format or 0 if error
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*/
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static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
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struct dpu_sw_pipe *pipe,
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const struct dpu_format *fmt, u32 src_width)
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{
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struct dpu_plane *pdpu;
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struct dpu_plane_state *pstate;
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u32 fixed_buff_size;
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u32 total_fl;
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if (!fmt || !plane->state || !src_width || !fmt->bpp) {
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if (!fmt || !pipe || !src_width || !fmt->bpp) {
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DPU_ERROR("invalid arguments\n");
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return 0;
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}
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pdpu = to_dpu_plane(plane);
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pstate = to_dpu_plane_state(plane->state);
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fixed_buff_size = pdpu->catalog->caps->pixel_ram_size;
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/* FIXME: in multirect case account for the src_width of all the planes */
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@ -252,7 +249,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
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((src_width + 32) * fmt->bpp);
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}
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} else {
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if (pstate->pipe.multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
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if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_PARALLEL) {
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total_fl = (fixed_buff_size / 2) * 2 /
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((src_width + 32) * fmt->bpp);
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} else {
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@ -262,7 +259,7 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
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}
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DPU_DEBUG_PLANE(pdpu, "pnum:%d fmt: %4.4s w:%u fl:%u\n",
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pdpu->pipe - SSPP_VIG0,
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pipe->sspp->idx - SSPP_VIG0,
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(char *)&fmt->base.pixel_format,
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src_width, total_fl);
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@ -272,25 +269,22 @@ static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
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/**
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* _dpu_plane_set_qos_lut - set QoS LUT of the given plane
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* @plane: Pointer to drm plane
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* @fb: Pointer to framebuffer associated with the given plane
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* @pipe: Pointer to software pipe
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* @fmt: Pointer to source buffer format
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* @pipe_cfg: Pointer to pipe configuration
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*/
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static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
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struct drm_framebuffer *fb, struct dpu_sw_pipe_cfg *pipe_cfg)
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struct dpu_sw_pipe *pipe,
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const struct dpu_format *fmt, struct dpu_sw_pipe_cfg *pipe_cfg)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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const struct dpu_format *fmt = NULL;
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u64 qos_lut;
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u32 total_fl = 0, lut_usage;
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if (!pdpu->is_rt_pipe) {
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lut_usage = DPU_QOS_LUT_USAGE_NRT;
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} else {
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fmt = dpu_get_dpu_format_ext(
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fb->format->format,
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fb->modifier);
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total_fl = _dpu_plane_calc_fill_level(plane, fmt,
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total_fl = _dpu_plane_calc_fill_level(plane, pipe, fmt,
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drm_rect_width(&pipe_cfg->src_rect));
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if (fmt && DPU_FORMAT_IS_LINEAR(fmt))
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@ -302,7 +296,7 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
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qos_lut = _dpu_hw_get_qos_lut(
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&pdpu->catalog->perf->qos_lut_tbl[lut_usage], total_fl);
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trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0,
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trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0,
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(fmt) ? fmt->base.pixel_format : 0,
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pdpu->is_rt_pipe, total_fl, qos_lut, lut_usage);
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@ -311,20 +305,20 @@ static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
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fmt ? (char *)&fmt->base.pixel_format : NULL,
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pdpu->is_rt_pipe, total_fl, qos_lut);
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pstate->pipe.sspp->ops.setup_creq_lut(pstate->pipe.sspp, qos_lut);
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pipe->sspp->ops.setup_creq_lut(pipe->sspp, qos_lut);
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}
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/**
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* _dpu_plane_set_danger_lut - set danger/safe LUT of the given plane
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* @plane: Pointer to drm plane
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* @fb: Pointer to framebuffer associated with the given plane
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* @pipe: Pointer to software pipe
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* @fmt: Pointer to source buffer format
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*/
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static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
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struct drm_framebuffer *fb)
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struct dpu_sw_pipe *pipe,
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const struct dpu_format *fmt)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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const struct dpu_format *fmt = NULL;
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u32 danger_lut, safe_lut;
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if (!pdpu->is_rt_pipe) {
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@ -333,10 +327,6 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
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safe_lut = pdpu->catalog->perf->safe_lut_tbl
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[DPU_QOS_LUT_USAGE_NRT];
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} else {
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fmt = dpu_get_dpu_format_ext(
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fb->format->format,
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fb->modifier);
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if (fmt && DPU_FORMAT_IS_LINEAR(fmt)) {
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danger_lut = pdpu->catalog->perf->danger_lut_tbl
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[DPU_QOS_LUT_USAGE_LINEAR];
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@ -363,29 +353,30 @@ static void _dpu_plane_set_danger_lut(struct drm_plane *plane,
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danger_lut,
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safe_lut);
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pstate->pipe.sspp->ops.setup_danger_safe_lut(pstate->pipe.sspp,
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pipe->sspp->ops.setup_danger_safe_lut(pipe->sspp,
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danger_lut, safe_lut);
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}
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/**
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* _dpu_plane_set_qos_ctrl - set QoS control of the given plane
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* @plane: Pointer to drm plane
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* @pipe: Pointer to software pipe
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* @enable: true to enable QoS control
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* @flags: QoS control mode (enum dpu_plane_qos)
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*/
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static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
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struct dpu_sw_pipe *pipe,
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bool enable, u32 flags)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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struct dpu_hw_pipe_qos_cfg pipe_qos_cfg;
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memset(&pipe_qos_cfg, 0, sizeof(pipe_qos_cfg));
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if (flags & DPU_PLANE_QOS_VBLANK_CTRL) {
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pipe_qos_cfg.creq_vblank = pstate->pipe.sspp->cap->sblk->creq_vblank;
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pipe_qos_cfg.creq_vblank = pipe->sspp->cap->sblk->creq_vblank;
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pipe_qos_cfg.danger_vblank =
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pstate->pipe.sspp->cap->sblk->danger_vblank;
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pipe->sspp->cap->sblk->danger_vblank;
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pipe_qos_cfg.vblank_en = enable;
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}
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@ -411,33 +402,34 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
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pipe_qos_cfg.danger_vblank,
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pdpu->is_rt_pipe);
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pstate->pipe.sspp->ops.setup_qos_ctrl(pstate->pipe.sspp,
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pipe->sspp->ops.setup_qos_ctrl(pipe->sspp,
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&pipe_qos_cfg);
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}
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/**
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* _dpu_plane_set_ot_limit - set OT limit for the given plane
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* @plane: Pointer to drm plane
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* @pipe: Pointer to software pipe
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* @crtc: Pointer to drm crtc
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* @pipe_cfg: Pointer to pipe configuration
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*/
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static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
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struct dpu_sw_pipe *pipe,
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struct drm_crtc *crtc, struct dpu_sw_pipe_cfg *pipe_cfg)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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struct dpu_vbif_set_ot_params ot_params;
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struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
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memset(&ot_params, 0, sizeof(ot_params));
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ot_params.xin_id = pstate->pipe.sspp->cap->xin_id;
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ot_params.num = pstate->pipe.sspp->idx - SSPP_NONE;
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ot_params.xin_id = pipe->sspp->cap->xin_id;
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ot_params.num = pipe->sspp->idx - SSPP_NONE;
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ot_params.width = drm_rect_width(&pipe_cfg->src_rect);
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ot_params.height = drm_rect_height(&pipe_cfg->src_rect);
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ot_params.is_wfd = !pdpu->is_rt_pipe;
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ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode);
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ot_params.vbif_idx = VBIF_RT;
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ot_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
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ot_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
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ot_params.rd = true;
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dpu_vbif_set_ot_limit(dpu_kms, &ot_params);
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@ -446,19 +438,20 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
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/**
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* _dpu_plane_set_qos_remap - set vbif QoS for the given plane
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* @plane: Pointer to drm plane
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* @pipe: Pointer to software pipe
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*/
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static void _dpu_plane_set_qos_remap(struct drm_plane *plane)
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static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
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struct dpu_sw_pipe *pipe)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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struct dpu_vbif_set_qos_params qos_params;
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struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
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memset(&qos_params, 0, sizeof(qos_params));
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qos_params.vbif_idx = VBIF_RT;
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qos_params.clk_ctrl = pstate->pipe.sspp->cap->clk_ctrl;
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qos_params.xin_id = pstate->pipe.sspp->cap->xin_id;
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qos_params.num = pstate->pipe.sspp->idx - SSPP_VIG0;
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qos_params.clk_ctrl = pipe->sspp->cap->clk_ctrl;
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qos_params.xin_id = pipe->sspp->cap->xin_id;
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qos_params.num = pipe->sspp->idx - SSPP_VIG0;
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qos_params.is_rt = pdpu->is_rt_pipe;
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DPU_DEBUG_PLANE(pdpu, "pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
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@ -1145,7 +1138,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
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pstate->needs_qos_remap |= (is_rt_pipe != pdpu->is_rt_pipe);
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pdpu->is_rt_pipe = is_rt_pipe;
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_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
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_dpu_plane_set_qos_ctrl(plane, pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
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DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT
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", %4.4s ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src),
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@ -1214,20 +1207,20 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
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}
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}
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_dpu_plane_set_qos_lut(plane, fb, &pipe_cfg);
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_dpu_plane_set_danger_lut(plane, fb);
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_dpu_plane_set_qos_lut(plane, pipe, fmt, &pipe_cfg);
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_dpu_plane_set_danger_lut(plane, pipe, fmt);
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if (plane->type != DRM_PLANE_TYPE_CURSOR) {
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_dpu_plane_set_qos_ctrl(plane, true, DPU_PLANE_QOS_PANIC_CTRL);
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_dpu_plane_set_ot_limit(plane, crtc, &pipe_cfg);
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_dpu_plane_set_qos_ctrl(plane, pipe, true, DPU_PLANE_QOS_PANIC_CTRL);
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_dpu_plane_set_ot_limit(plane, pipe, crtc, &pipe_cfg);
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}
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if (pstate->needs_qos_remap) {
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pstate->needs_qos_remap = false;
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_dpu_plane_set_qos_remap(plane);
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_dpu_plane_set_qos_remap(plane, pipe);
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}
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_dpu_plane_calc_bw(plane, fb, &pipe_cfg);
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_dpu_plane_calc_bw(plane, fmt, &pipe_cfg);
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_dpu_plane_calc_clk(plane, &pipe_cfg);
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}
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@ -1264,11 +1257,13 @@ static void dpu_plane_atomic_update(struct drm_plane *plane,
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static void dpu_plane_destroy(struct drm_plane *plane)
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{
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struct dpu_plane *pdpu = plane ? to_dpu_plane(plane) : NULL;
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struct dpu_plane_state *pstate;
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DPU_DEBUG_PLANE(pdpu, "\n");
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if (pdpu) {
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_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
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pstate = to_dpu_plane_state(plane->state);
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_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, false, DPU_PLANE_QOS_PANIC_CTRL);
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mutex_destroy(&pdpu->lock);
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@ -1397,13 +1392,14 @@ static void dpu_plane_reset(struct drm_plane *plane)
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void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state);
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struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
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if (!pdpu->is_rt_pipe)
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return;
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pm_runtime_get_sync(&dpu_kms->pdev->dev);
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_dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL);
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_dpu_plane_set_qos_ctrl(plane, &pstate->pipe, enable, DPU_PLANE_QOS_PANIC_CTRL);
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pm_runtime_put_sync(&dpu_kms->pdev->dev);
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}
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#endif
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