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- Simplify microcode patches loading on AMD Zen and newer by using the family,
model and stepping encoded in the patch revision number - Fix a silly clang warning -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmbe7qkACgkQEsHwGGHe VUrUFw/+Npl6FuQY9B18TUgTg64ln41fYtMIFpV3Gn64Ny/LhAJ7kyMbDrxH9nCV rwlCrqsyek0tIFWSslTuvTbrjK+omOLmhlJRlrYQ4V+lEWtliTOenQ35vkBwf3wS AVnKEhsbe2SWD2eV5kJPpGdNwuZiGhg8t8ZD959OPbMZkyEZ+Rz3KCGYKO5L+5a4 CHGDnM+HOGhCQ4mek8Rya8aFWNWb7eh6CmGjDTYfAGE5AIoNeNRejruRrFXHZIff N7LlNMfqlTDWLx1Q26OXL9wes3PryNrUiAyTuDQnrS74E5OyvjzsyTW0rirmdFEa UfcPxedStj8Cse6nJfR0yaprAoTH6eCHkzj2sPcY8dcl8jhq9ChE2T2yjGSX642f 4zneXA2kFYRpw6E+Y5qqB9kViEZiyUaSZ5LasucqE5TrZwaBPaXMBo3WqhvKRMuc mjH//Mo8CPNN4RpFk+1Ii8KnTyOE41WbMEJuzqdfQnzKJ2X5xxa6HZB7oHzne/HI tHEWJCInoRz8losvXPICJb20AKu/8vIS2F5ROXNCDPIAw/Fl+UT1prH4+Wo2nZB+ 8wElMzqTaWVcaQ2nAaUDSYompimbYCtgB3KWt9WLnBuHsXVbOQkdNyL7+bcQjV39 KXVxo5QZlqc1Oqea+BURJ7BBq6VOssFiUeg8dW0FE4xzT3CS4N8= =kPyL -----END PGP SIGNATURE----- Merge tag 'x86_microcode_for_v6.12_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 microcode loading updates from Borislav Petkov: - Simplify microcode patches loading on AMD Zen and newer by using the family, model and stepping encoded in the patch revision number - Fix a silly clang warning * tag 'x86_microcode_for_v6.12_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/microcode/AMD: Fix a -Wsometimes-uninitialized clang false positive x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID
This commit is contained in:
Linus Torvalds
commit
79f1a6adef
@ -89,6 +89,31 @@ static struct equiv_cpu_table {
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struct equiv_cpu_entry *entry;
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} equiv_table;
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union zen_patch_rev {
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struct {
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__u32 rev : 8,
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stepping : 4,
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model : 4,
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__reserved : 4,
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ext_model : 4,
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ext_fam : 8;
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};
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__u32 ucode_rev;
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};
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union cpuid_1_eax {
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struct {
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__u32 stepping : 4,
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model : 4,
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family : 4,
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__reserved0 : 4,
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ext_model : 4,
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ext_fam : 8,
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__reserved1 : 4;
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};
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__u32 full;
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};
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/*
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* This points to the current valid container of microcode patches which we will
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* save from the initrd/builtin before jettisoning its contents. @mc is the
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@ -96,7 +121,6 @@ static struct equiv_cpu_table {
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*/
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struct cont_desc {
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struct microcode_amd *mc;
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u32 cpuid_1_eax;
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u32 psize;
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u8 *data;
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size_t size;
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@ -109,10 +133,42 @@ struct cont_desc {
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static const char
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ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
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/*
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* This is CPUID(1).EAX on the BSP. It is used in two ways:
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*
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* 1. To ignore the equivalence table on Zen1 and newer.
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*
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* 2. To match which patches to load because the patch revision ID
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* already contains the f/m/s for which the microcode is destined
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* for.
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*/
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static u32 bsp_cpuid_1_eax __ro_after_init;
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static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
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{
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union zen_patch_rev p;
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union cpuid_1_eax c;
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p.ucode_rev = val;
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c.full = 0;
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c.stepping = p.stepping;
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c.model = p.model;
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c.ext_model = p.ext_model;
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c.family = 0xf;
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c.ext_fam = p.ext_fam;
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return c;
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}
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static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig)
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{
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unsigned int i;
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/* Zen and newer do not need an equivalence table. */
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if (x86_family(bsp_cpuid_1_eax) >= 0x17)
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return 0;
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if (!et || !et->num_entries)
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return 0;
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@ -159,6 +215,10 @@ static bool verify_equivalence_table(const u8 *buf, size_t buf_size)
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if (!verify_container(buf, buf_size))
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return false;
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/* Zen and newer do not need an equivalence table. */
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if (x86_family(bsp_cpuid_1_eax) >= 0x17)
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return true;
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cont_type = hdr[1];
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if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) {
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pr_debug("Wrong microcode container equivalence table type: %u.\n",
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@ -222,8 +282,9 @@ __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize)
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* exceed the per-family maximum). @sh_psize is the size read from the section
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* header.
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*/
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static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size)
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static unsigned int __verify_patch_size(u32 sh_psize, size_t buf_size)
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{
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u8 family = x86_family(bsp_cpuid_1_eax);
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u32 max_size;
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if (family >= 0x15)
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@ -258,9 +319,9 @@ static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size
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* positive: patch is not for this family, skip it
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* 0: success
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*/
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static int
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verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size)
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static int verify_patch(const u8 *buf, size_t buf_size, u32 *patch_size)
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{
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u8 family = x86_family(bsp_cpuid_1_eax);
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struct microcode_header_amd *mc_hdr;
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unsigned int ret;
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u32 sh_psize;
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@ -286,7 +347,7 @@ verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size)
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return -1;
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}
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ret = __verify_patch_size(family, sh_psize, buf_size);
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ret = __verify_patch_size(sh_psize, buf_size);
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if (!ret) {
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pr_debug("Per-family patch size mismatch.\n");
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return -1;
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@ -308,6 +369,15 @@ verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size)
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return 0;
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}
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static bool mc_patch_matches(struct microcode_amd *mc, u16 eq_id)
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{
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/* Zen and newer do not need an equivalence table. */
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if (x86_family(bsp_cpuid_1_eax) >= 0x17)
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return ucode_rev_to_cpuid(mc->hdr.patch_id).full == bsp_cpuid_1_eax;
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else
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return eq_id == mc->hdr.processor_rev_id;
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}
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/*
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* This scans the ucode blob for the proper container as we can have multiple
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* containers glued together. Returns the equivalence ID from the equivalence
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@ -336,7 +406,7 @@ static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
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* doesn't contain a patch for the CPU, scan through the whole container
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* so that it can be skipped in case there are other containers appended.
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*/
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eq_id = find_equiv_id(&table, desc->cpuid_1_eax);
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eq_id = find_equiv_id(&table, bsp_cpuid_1_eax);
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buf += hdr[2] + CONTAINER_HDR_SZ;
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size -= hdr[2] + CONTAINER_HDR_SZ;
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@ -350,7 +420,7 @@ static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
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u32 patch_size;
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int ret;
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ret = verify_patch(x86_family(desc->cpuid_1_eax), buf, size, &patch_size);
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ret = verify_patch(buf, size, &patch_size);
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if (ret < 0) {
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/*
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* Patch verification failed, skip to the next container, if
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@ -363,7 +433,7 @@ static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
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}
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mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE);
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if (eq_id == mc->hdr.processor_rev_id) {
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if (mc_patch_matches(mc, eq_id)) {
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desc->psize = patch_size;
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desc->mc = mc;
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}
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@ -421,6 +491,7 @@ static int __apply_microcode_amd(struct microcode_amd *mc)
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/* verify patch application was successful */
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native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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if (rev != mc->hdr.patch_id)
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return -1;
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@ -438,14 +509,12 @@ static int __apply_microcode_amd(struct microcode_amd *mc)
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*
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* Returns true if container found (sets @desc), false otherwise.
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*/
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static bool early_apply_microcode(u32 cpuid_1_eax, u32 old_rev, void *ucode, size_t size)
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static bool early_apply_microcode(u32 old_rev, void *ucode, size_t size)
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{
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struct cont_desc desc = { 0 };
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struct microcode_amd *mc;
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bool ret = false;
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desc.cpuid_1_eax = cpuid_1_eax;
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scan_containers(ucode, size, &desc);
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mc = desc.mc;
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@ -463,9 +532,10 @@ static bool early_apply_microcode(u32 cpuid_1_eax, u32 old_rev, void *ucode, siz
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return !__apply_microcode_amd(mc);
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}
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static bool get_builtin_microcode(struct cpio_data *cp, u8 family)
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static bool get_builtin_microcode(struct cpio_data *cp)
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{
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char fw_name[36] = "amd-ucode/microcode_amd.bin";
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u8 family = x86_family(bsp_cpuid_1_eax);
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struct firmware fw;
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if (IS_ENABLED(CONFIG_X86_32))
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@ -484,11 +554,11 @@ static bool get_builtin_microcode(struct cpio_data *cp, u8 family)
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return false;
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}
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static void __init find_blobs_in_containers(unsigned int cpuid_1_eax, struct cpio_data *ret)
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static void __init find_blobs_in_containers(struct cpio_data *ret)
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{
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struct cpio_data cp;
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if (!get_builtin_microcode(&cp, x86_family(cpuid_1_eax)))
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if (!get_builtin_microcode(&cp))
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cp = find_microcode_in_initrd(ucode_path);
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*ret = cp;
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@ -499,16 +569,18 @@ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_
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struct cpio_data cp = { };
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u32 dummy;
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bsp_cpuid_1_eax = cpuid_1_eax;
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native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy);
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/* Needed in load_microcode_amd() */
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ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
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find_blobs_in_containers(cpuid_1_eax, &cp);
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find_blobs_in_containers(&cp);
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if (!(cp.data && cp.size))
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return;
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if (early_apply_microcode(cpuid_1_eax, ed->old_rev, cp.data, cp.size))
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if (early_apply_microcode(ed->old_rev, cp.data, cp.size))
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native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
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}
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@ -525,12 +597,10 @@ static int __init save_microcode_in_initrd(void)
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if (dis_ucode_ldr || c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10)
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return 0;
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find_blobs_in_containers(cpuid_1_eax, &cp);
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find_blobs_in_containers(&cp);
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if (!(cp.data && cp.size))
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return -EINVAL;
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desc.cpuid_1_eax = cpuid_1_eax;
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scan_containers(cp.data, cp.size, &desc);
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if (!desc.mc)
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return -EINVAL;
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@ -543,26 +613,65 @@ static int __init save_microcode_in_initrd(void)
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}
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early_initcall(save_microcode_in_initrd);
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static inline bool patch_cpus_equivalent(struct ucode_patch *p, struct ucode_patch *n)
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{
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/* Zen and newer hardcode the f/m/s in the patch ID */
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if (x86_family(bsp_cpuid_1_eax) >= 0x17) {
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union cpuid_1_eax p_cid = ucode_rev_to_cpuid(p->patch_id);
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union cpuid_1_eax n_cid = ucode_rev_to_cpuid(n->patch_id);
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/* Zap stepping */
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p_cid.stepping = 0;
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n_cid.stepping = 0;
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return p_cid.full == n_cid.full;
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} else {
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return p->equiv_cpu == n->equiv_cpu;
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}
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}
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/*
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* a small, trivial cache of per-family ucode patches
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*/
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static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
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static struct ucode_patch *cache_find_patch(struct ucode_cpu_info *uci, u16 equiv_cpu)
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{
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struct ucode_patch *p;
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struct ucode_patch n;
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n.equiv_cpu = equiv_cpu;
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n.patch_id = uci->cpu_sig.rev;
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WARN_ON_ONCE(!n.patch_id);
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list_for_each_entry(p, µcode_cache, plist)
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if (p->equiv_cpu == equiv_cpu)
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if (patch_cpus_equivalent(p, &n))
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return p;
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return NULL;
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}
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static inline bool patch_newer(struct ucode_patch *p, struct ucode_patch *n)
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{
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/* Zen and newer hardcode the f/m/s in the patch ID */
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if (x86_family(bsp_cpuid_1_eax) >= 0x17) {
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union zen_patch_rev zp, zn;
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zp.ucode_rev = p->patch_id;
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zn.ucode_rev = n->patch_id;
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return zn.rev > zp.rev;
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} else {
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return n->patch_id > p->patch_id;
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}
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}
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static void update_cache(struct ucode_patch *new_patch)
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{
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struct ucode_patch *p;
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list_for_each_entry(p, µcode_cache, plist) {
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if (p->equiv_cpu == new_patch->equiv_cpu) {
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if (p->patch_id >= new_patch->patch_id) {
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if (patch_cpus_equivalent(p, new_patch)) {
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if (!patch_newer(p, new_patch)) {
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/* we already have the latest patch */
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kfree(new_patch->data);
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kfree(new_patch);
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@ -593,13 +702,22 @@ static void free_cache(void)
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static struct ucode_patch *find_patch(unsigned int cpu)
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{
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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u16 equiv_id;
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u32 rev, dummy __always_unused;
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u16 equiv_id = 0;
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equiv_id = find_equiv_id(&equiv_table, uci->cpu_sig.sig);
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if (!equiv_id)
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return NULL;
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/* fetch rev if not populated yet: */
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if (!uci->cpu_sig.rev) {
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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uci->cpu_sig.rev = rev;
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}
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|
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return cache_find_patch(equiv_id);
|
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if (x86_family(bsp_cpuid_1_eax) < 0x17) {
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equiv_id = find_equiv_id(&equiv_table, uci->cpu_sig.sig);
|
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if (!equiv_id)
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return NULL;
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}
|
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|
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return cache_find_patch(uci, equiv_id);
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}
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void reload_ucode_amd(unsigned int cpu)
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@ -649,7 +767,7 @@ static enum ucode_state apply_microcode_amd(int cpu)
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struct ucode_cpu_info *uci;
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struct ucode_patch *p;
|
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enum ucode_state ret;
|
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u32 rev, dummy __always_unused;
|
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u32 rev;
|
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|
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BUG_ON(raw_smp_processor_id() != cpu);
|
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|
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@ -659,11 +777,11 @@ static enum ucode_state apply_microcode_amd(int cpu)
|
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if (!p)
|
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return UCODE_NFOUND;
|
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|
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rev = uci->cpu_sig.rev;
|
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|
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mc_amd = p->data;
|
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uci->mc = p->data;
|
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|
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
|
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|
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/* need to apply patch? */
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if (rev > mc_amd->hdr.patch_id) {
|
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ret = UCODE_OK;
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@ -709,6 +827,10 @@ static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size)
|
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hdr = (const u32 *)buf;
|
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equiv_tbl_len = hdr[2];
|
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|
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/* Zen and newer do not need an equivalence table. */
|
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if (x86_family(bsp_cpuid_1_eax) >= 0x17)
|
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goto out;
|
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|
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equiv_table.entry = vmalloc(equiv_tbl_len);
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if (!equiv_table.entry) {
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pr_err("failed to allocate equivalent CPU table\n");
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@ -718,12 +840,16 @@ static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size)
|
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memcpy(equiv_table.entry, buf + CONTAINER_HDR_SZ, equiv_tbl_len);
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equiv_table.num_entries = equiv_tbl_len / sizeof(struct equiv_cpu_entry);
|
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out:
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/* add header length */
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return equiv_tbl_len + CONTAINER_HDR_SZ;
|
||||
}
|
||||
|
||||
static void free_equiv_cpu_table(void)
|
||||
{
|
||||
if (x86_family(bsp_cpuid_1_eax) >= 0x17)
|
||||
return;
|
||||
|
||||
vfree(equiv_table.entry);
|
||||
memset(&equiv_table, 0, sizeof(equiv_table));
|
||||
}
|
||||
@ -749,7 +875,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
|
||||
u16 proc_id;
|
||||
int ret;
|
||||
|
||||
ret = verify_patch(family, fw, leftover, patch_size);
|
||||
ret = verify_patch(fw, leftover, patch_size);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -774,7 +900,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
|
||||
patch->patch_id = mc_hdr->patch_id;
|
||||
patch->equiv_cpu = proc_id;
|
||||
|
||||
pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
|
||||
pr_debug("%s: Adding patch_id: 0x%08x, proc_id: 0x%04x\n",
|
||||
__func__, patch->patch_id, proc_id);
|
||||
|
||||
/* ... and add to cache. */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user