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net: smc911x: convert pxa dma to dmaengine
Convert the dma transfers to be dmaengine based, now pxa has a dmaengine slave driver. This makes this driver a bit more PXA agnostic. The driver was only compile tested. The risk is quite small as no current PXA platform I'm aware of is using smc911x driver. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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c9d0bc5d22
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79d3b59a93
@ -73,6 +73,9 @@ static const char version[] =
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/dmaengine.h>
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#include <linux/dma/pxa-dma.h>
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#include <asm/io.h>
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#include "smc911x.h"
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@ -1174,18 +1177,16 @@ static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
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#ifdef SMC_USE_DMA
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static void
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smc911x_tx_dma_irq(int dma, void *data)
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smc911x_tx_dma_irq(void *data)
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{
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struct net_device *dev = (struct net_device *)data;
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struct smc911x_local *lp = netdev_priv(dev);
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struct smc911x_local *lp = data;
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struct net_device *dev = lp->netdev;
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struct sk_buff *skb = lp->current_tx_skb;
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unsigned long flags;
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DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
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DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
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/* Clear the DMA interrupt sources */
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SMC_DMA_ACK_IRQ(dev, dma);
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BUG_ON(skb == NULL);
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dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
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dev->trans_start = jiffies;
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@ -1208,18 +1209,16 @@ smc911x_tx_dma_irq(int dma, void *data)
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"TX DMA irq completed\n");
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}
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static void
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smc911x_rx_dma_irq(int dma, void *data)
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smc911x_rx_dma_irq(void *data)
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{
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struct net_device *dev = (struct net_device *)data;
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struct smc911x_local *lp = netdev_priv(dev);
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struct smc911x_local *lp = data;
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struct net_device *dev = lp->netdev;
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struct sk_buff *skb = lp->current_rx_skb;
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unsigned long flags;
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unsigned int pkts;
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DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
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DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
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/* Clear the DMA interrupt sources */
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SMC_DMA_ACK_IRQ(dev, dma);
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dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
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BUG_ON(skb == NULL);
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lp->current_rx_skb = NULL;
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@ -1792,6 +1791,9 @@ static int smc911x_probe(struct net_device *dev)
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unsigned int val, chip_id, revision;
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const char *version_string;
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unsigned long irq_flags;
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struct dma_slave_config config;
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dma_cap_mask_t mask;
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struct pxad_param param;
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DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
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@ -1963,11 +1965,40 @@ static int smc911x_probe(struct net_device *dev)
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goto err_out;
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#ifdef SMC_USE_DMA
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lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
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lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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param.prio = PXAD_PRIO_LOWEST;
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param.drcmr = -1UL;
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lp->rxdma =
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dma_request_slave_channel_compat(mask, pxad_filter_fn,
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¶m, &dev->dev, "rx");
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lp->txdma =
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dma_request_slave_channel_compat(mask, pxad_filter_fn,
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¶m, &dev->dev, "tx");
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lp->rxdma_active = 0;
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lp->txdma_active = 0;
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dev->dma = lp->rxdma;
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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config.src_addr = lp->physaddr + RX_DATA_FIFO;
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config.dst_addr = lp->physaddr + TX_DATA_FIFO;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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retval = dmaengine_slave_config(lp->rxdma, &config);
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if (retval) {
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dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
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retval);
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goto err_out;
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}
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retval = dmaengine_slave_config(lp->txdma, &config);
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if (retval) {
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dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
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retval);
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goto err_out;
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}
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#endif
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retval = register_netdev(dev);
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@ -1978,11 +2009,11 @@ static int smc911x_probe(struct net_device *dev)
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dev->base_addr, dev->irq);
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#ifdef SMC_USE_DMA
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if (lp->rxdma != -1)
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pr_cont(" RXDMA %d", lp->rxdma);
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if (lp->rxdma)
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pr_cont(" RXDMA %p", lp->rxdma);
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if (lp->txdma != -1)
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pr_cont(" TXDMA %d", lp->txdma);
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if (lp->txdma)
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pr_cont(" TXDMA %p", lp->txdma);
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#endif
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pr_cont("\n");
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if (!is_valid_ether_addr(dev->dev_addr)) {
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@ -2005,12 +2036,10 @@ static int smc911x_probe(struct net_device *dev)
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err_out:
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#ifdef SMC_USE_DMA
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if (retval) {
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if (lp->rxdma != -1) {
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SMC_DMA_FREE(dev, lp->rxdma);
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}
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if (lp->txdma != -1) {
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SMC_DMA_FREE(dev, lp->txdma);
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}
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if (lp->rxdma)
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dma_release_channel(lp->rxdma);
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if (lp->txdma)
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dma_release_channel(lp->txdma);
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}
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#endif
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return retval;
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@ -2112,12 +2141,10 @@ static int smc911x_drv_remove(struct platform_device *pdev)
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#ifdef SMC_USE_DMA
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{
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if (lp->rxdma != -1) {
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SMC_DMA_FREE(dev, lp->rxdma);
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}
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if (lp->txdma != -1) {
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SMC_DMA_FREE(dev, lp->txdma);
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}
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if (lp->rxdma)
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dma_release_channel(lp->rxdma);
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if (lp->txdma)
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dma_release_channel(lp->txdma);
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}
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#endif
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iounmap(lp->base);
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@ -101,8 +101,8 @@ struct smc911x_local {
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#ifdef SMC_USE_DMA
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/* DMA needs the physical address of the chip */
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u_long physaddr;
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int rxdma;
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int txdma;
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struct dma_chan *rxdma;
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struct dma_chan *txdma;
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int rxdma_active;
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int txdma_active;
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struct sk_buff *current_rx_skb;
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@ -210,27 +210,6 @@ static inline void SMC_outsl(struct smc911x_local *lp, int reg,
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#ifdef SMC_USE_PXA_DMA
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#include <mach/dma.h>
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/*
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* Define the request and free functions
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* These are unfortunately architecture specific as no generic allocation
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* mechanism exits
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*/
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#define SMC_DMA_REQUEST(dev, handler) \
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pxa_request_dma(dev->name, DMA_PRIO_LOW, handler, dev)
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#define SMC_DMA_FREE(dev, dma) \
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pxa_free_dma(dma)
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#define SMC_DMA_ACK_IRQ(dev, dma) \
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{ \
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if (DCSR(dma) & DCSR_BUSERR) { \
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netdev_err(dev, "DMA %d bus error!\n", dma); \
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} \
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DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; \
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}
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/*
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* Use a DMA for RX and TX packets.
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*/
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@ -238,6 +217,8 @@ static inline void SMC_outsl(struct smc911x_local *lp, int reg,
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static dma_addr_t rx_dmabuf, tx_dmabuf;
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static int rx_dmalen, tx_dmalen;
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static void smc911x_rx_dma_irq(void *data);
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static void smc911x_tx_dma_irq(void *data);
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#ifdef SMC_insl
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#undef SMC_insl
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@ -246,8 +227,10 @@ static int rx_dmalen, tx_dmalen;
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static inline void
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smc_pxa_dma_insl(struct smc911x_local *lp, u_long physaddr,
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int reg, int dma, u_char *buf, int len)
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int reg, struct dma_chan *dma, u_char *buf, int len)
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{
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struct dma_async_tx_descriptor *tx;
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/* 64 bit alignment is required for memory to memory DMA */
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if ((long)buf & 4) {
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*((u32 *)buf) = SMC_inl(lp, reg);
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@ -258,12 +241,14 @@ smc_pxa_dma_insl(struct smc911x_local *lp, u_long physaddr,
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len *= 4;
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rx_dmabuf = dma_map_single(lp->dev, buf, len, DMA_FROM_DEVICE);
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rx_dmalen = len;
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DCSR(dma) = DCSR_NODESC;
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DTADR(dma) = rx_dmabuf;
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DSADR(dma) = physaddr + reg;
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DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
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DCMD_WIDTH4 | DCMD_ENDIRQEN | (DCMD_LENGTH & rx_dmalen));
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DCSR(dma) = DCSR_NODESC | DCSR_RUN;
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tx = dmaengine_prep_slave_single(dma, rx_dmabuf, rx_dmalen,
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DMA_DEV_TO_MEM, 0);
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if (tx) {
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tx->callback = smc911x_rx_dma_irq;
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tx->callback_param = lp;
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dmaengine_submit(tx);
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dma_async_issue_pending(dma);
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}
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}
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#endif
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@ -274,8 +259,10 @@ smc_pxa_dma_insl(struct smc911x_local *lp, u_long physaddr,
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static inline void
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smc_pxa_dma_outsl(struct smc911x_local *lp, u_long physaddr,
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int reg, int dma, u_char *buf, int len)
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int reg, struct dma_chan *dma, u_char *buf, int len)
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{
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struct dma_async_tx_descriptor *tx;
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/* 64 bit alignment is required for memory to memory DMA */
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if ((long)buf & 4) {
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SMC_outl(*((u32 *)buf), lp, reg);
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@ -286,12 +273,14 @@ smc_pxa_dma_outsl(struct smc911x_local *lp, u_long physaddr,
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len *= 4;
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tx_dmabuf = dma_map_single(lp->dev, buf, len, DMA_TO_DEVICE);
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tx_dmalen = len;
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DCSR(dma) = DCSR_NODESC;
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DSADR(dma) = tx_dmabuf;
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DTADR(dma) = physaddr + reg;
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DCMD(dma) = (DCMD_INCSRCADDR | DCMD_BURST32 |
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DCMD_WIDTH4 | DCMD_ENDIRQEN | (DCMD_LENGTH & tx_dmalen));
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DCSR(dma) = DCSR_NODESC | DCSR_RUN;
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tx = dmaengine_prep_slave_single(dma, tx_dmabuf, tx_dmalen,
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DMA_DEV_TO_MEM, 0);
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if (tx) {
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tx->callback = smc911x_tx_dma_irq;
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tx->callback_param = lp;
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dmaengine_submit(tx);
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dma_async_issue_pending(dma);
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}
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}
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#endif
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#endif /* SMC_USE_PXA_DMA */
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