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dt-bindings: remove 'interrupt-parent' from bindings
'interrupt-parent' is often documented as part of define bindings, but it is really outside the scope of a device binding. It's never required in a given node as it is often inherited from a parent node. Or it can be implicit if a parent node is an 'interrupt-controller' node. So remove it from all the binding files. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
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@ -18,9 +18,6 @@ Required properties:
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assignment of the interrupt router is required.
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Flags get passed only when using GIC as parent. Flags
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encoding as documented by the GIC bindings.
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- interrupt-parent: Should be the phandle for the interrupt controller of
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the CPU the device tree is intended to be used on. This
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is either the node of the GIC or NVIC controller.
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Example:
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mscm_ir: interrupt-controller@40001800 {
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@ -10,7 +10,6 @@ Required properties:
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- compatible : Should be "ti,irq-crossbar"
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- reg: Base address and the size of the crossbar registers.
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- interrupt-controller: indicates that this block is an interrupt controller.
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- interrupt-parent: the interrupt controller this block is connected to.
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- ti,max-irqs: Total number of irqs available at the parent interrupt controller.
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- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
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- ti,reg-size: Size of a individual register in bytes. Every individual
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@ -40,9 +40,6 @@ following properties:
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- #interrupt-cells: must be identical to the that of the parent interrupt
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controller.
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- interrupt-parent: a phandle indicating which interrupt controller
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this PMU signals interrupts to.
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Optional nodes:
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@ -16,7 +16,6 @@ Required properties:
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4 for controller @ 0x1b000
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Optional properties:
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- interrupt-parent : optional, if needed for interrupt mapping
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- reg : <registers mapping>
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Example:
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@ -3,8 +3,6 @@
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Required properties:
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- compatible: "arasan,cf-spear1340"
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- reg: Address range of the CF registers
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- interrupt: Should contain the CF interrupt number
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- clock-frequency: Interface clock rate, in Hz, one of
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25000000
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@ -29,7 +29,6 @@ Required properties:
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- reg: should contain the address and the length of the FPGA register set.
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Optional properties:
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- interrupt-parent: should specify phandle for the interrupt controller.
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- interrupts: should specify event (wakeup) IRQ.
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Example (P1022DS):
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@ -9,8 +9,6 @@ Required properties:
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"brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips
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"brcm,bcm7038-gisb-arb" for 130nm chips
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- reg: specifies the base physical address and size of the registers
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- interrupt-parent: specifies the phandle to the parent interrupt controller
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this arbiter gets interrupt line from
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- interrupts: specifies the two interrupts (timeout and TEA) to be used from
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the parent interrupt controller
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@ -180,7 +180,6 @@ For example:
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};
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Required properties for main clock internal RC oscillator:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<0>".
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- clock-frequency : define the internal RC oscillator frequency.
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@ -197,7 +196,6 @@ For example:
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};
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Required properties for main clock oscillator:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<0>".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall encode the main osc source clk sources (see atmel datasheet).
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@ -218,7 +216,6 @@ For example:
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};
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Required properties for main clock:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<0>".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall encode the main clk sources (see atmel datasheet).
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@ -233,7 +230,6 @@ For example:
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};
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Required properties for master clock:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<3>".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall be the master clock sources (see atmel datasheet) phandles.
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@ -292,7 +288,6 @@ For example:
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Required properties for pll clocks:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<1>".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall be the main clock phandle.
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@ -348,7 +343,6 @@ For example:
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};
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Required properties for programmable clocks:
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- interrupt-parent : must reference the PMC node.
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- #size-cells : shall be 0 (reg is used to encode clk id).
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- #address-cells : shall be 1 (reg is used to encode clk id).
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- clocks : shall be the programmable clock source phandles.
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@ -451,7 +445,6 @@ For example:
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Required properties for utmi clock:
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- interrupt-parent : must reference the PMC node.
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- interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : shall be the main clock source phandle.
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@ -29,8 +29,6 @@ Required properties:
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- reg: Specifies base physical address and size of the registers.
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- interrupts: The interrupt that the AVS CPU will use to interrupt the host
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when a command completed.
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- interrupt-parent: The interrupt controller the above interrupt is routed
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through.
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- interrupt-names: The name of the interrupt used to interrupt the host.
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Optional properties:
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@ -3,8 +3,6 @@
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Required properties:
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- compatible: Should be "amd,ccp-seattle-v1a"
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- reg: Address and length of the register set for the device
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- interrupts: Should contain the CCP interrupt
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Optional properties:
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@ -7,8 +7,6 @@ Required properties:
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- interrupts: Interrupt number for the device.
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Optional properties:
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- interrupt-parent: The phandle for the interrupt controller that services
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interrupts for this device.
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- clocks: Reference to the crypto engine clock.
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- dma-coherent: Present if dma operations are coherent.
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@ -50,11 +50,6 @@ remaining bits are reserved for future SEC EUs.
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..and so on and so forth.
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Optional properties:
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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Example:
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/* MPC8548E */
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@ -99,13 +99,6 @@ PROPERTIES
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of the specifier is defined by the binding document
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describing the node's interrupt parent.
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- interrupt-parent
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Usage: (required if interrupt property is defined)
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Value type: <phandle>
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Definition: A single <phandle> value that points
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to the interrupt parent to which the child domain
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is being mapped.
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- clocks
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Usage: required if SEC 4.0 requires explicit enablement of clocks
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Value type: <prop_encoded-array>
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@ -199,13 +192,6 @@ Job Ring (JR) Node
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of the specifier is defined by the binding document
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describing the node's interrupt parent.
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- interrupt-parent
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Usage: (required if interrupt property is defined)
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Value type: <phandle>
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Definition: A single <phandle> value that points
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to the interrupt parent to which the child domain
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is being mapped.
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EXAMPLE
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jr@1000 {
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compatible = "fsl,sec-v4.0-job-ring";
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@ -370,13 +356,6 @@ Secure Non-Volatile Storage (SNVS) Node
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of the specifier is defined by the binding document
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describing the node's interrupt parent.
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- interrupt-parent
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Usage: (required if interrupt property is defined)
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Value type: <phandle>
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Definition: A single <phandle> value that points
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to the interrupt parent to which the child domain
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is being mapped.
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EXAMPLE
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sec_mon@314000 {
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compatible = "fsl,sec-v4.0-mon", "syscon";
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@ -7,8 +7,6 @@ Required properties:
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- compatible : "picochip,spacc-ipsec" for the IPSEC offload engine
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"picochip,spacc-l2" for the femtocell layer 2 ciphering engine.
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- reg : Offset and length of the register set for this device
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- interrupt-parent : The interrupt controller that controls the SPAcc
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interrupt.
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- interrupts : The interrupt line from the SPAcc.
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- ref-clock : The input clock that drives the SPAcc.
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@ -15,8 +15,6 @@ Required properties for dp-controller:
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from common clock binding: handle to dp clock.
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-clock-names:
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from common clock binding: Shall be "dp".
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-interrupt-parent:
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phandle to Interrupt combiner node.
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-phys:
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from general PHY binding: the phandle for the PHY device.
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-phy-names:
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@ -8,8 +8,6 @@ Required properties:
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- compatible : "analogix,anx7814"
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- reg : I2C address of the device
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- interrupt-parent : Should be the phandle of the interrupt controller
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that services interrupts for this device
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- interrupts : Should contain the INTP interrupt
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- hpd-gpios : Which GPIO to use for hpd
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- pd-gpios : Which GPIO to use for power down
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@ -19,8 +19,6 @@ hardware are EDID, HPD, and interrupts.
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stdp4028-ge-b850v3-fw required properties:
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- compatible : "megachips,stdp4028-ge-b850v3-fw"
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- reg : I2C bus address
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- interrupt-parent : phandle of the interrupt controller that services
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interrupts to the device
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- interrupts : one interrupt should be described here, as in
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<0 IRQ_TYPE_LEVEL_HIGH>
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- ports : One input port(reg = <0>) and one output port(reg = <1>)
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@ -5,8 +5,8 @@ Required properties:
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- reg: i2c address of the bridge
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Optional properties:
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- interrupts-extended or interrupt-parent + interrupts: describe
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the interrupt line used to inform the host about hotplug events.
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- interrupts: describe the interrupt line used to inform the host
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about hotplug events.
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- reset-gpios: OF device-tree gpio specification for RST_N pin.
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Optional subnodes:
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@ -7,7 +7,7 @@ Required properties:
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- iovcc18-supply : I/O Supply Voltage (1.8V)
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- avcc12-supply : TMDS Analog Supply Voltage (1.2V)
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- cvcc12-supply : Digital Core Supply Voltage (1.2V)
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- interrupts, interrupt-parent: interrupt specifier of INT pin
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- interrupts: interrupt specifier of INT pin
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- reset-gpios: gpio specifier of RESET pin (active low)
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- video interfaces: Device node can contain two video interface port
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nodes for HDMI encoder and connector according to [1].
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- reg: i2c address of the bridge
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- cvcc10-supply: Digital Core Supply Voltage (1.0V)
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- iovcc18-supply: I/O Supply Voltage (1.8V)
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- interrupts, interrupt-parent: interrupt specifier of INT pin
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- interrupts: interrupt specifier of INT pin
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- reset-gpios: gpio specifier of RESET pin
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- clocks, clock-names: specification and name of "xtal" clock
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- video interfaces: Device node can contain video interface port
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@ -9,9 +9,6 @@ Required properties:
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- reg: physical base address and length of the DECON registers set.
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- interrupt-parent: should be the phandle of the decon controller's
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parent interrupt controller.
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- interrupts: should contain a list of all DECON IP block interrupts in the
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order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
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format depends on the interrupt controller used.
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@ -25,8 +25,6 @@ Required properties for dp-controller:
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from common clock binding: handle to dp clock.
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-clock-names:
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from common clock binding: Shall be "dp".
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-interrupt-parent:
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phandle to Interrupt combiner node.
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-phys:
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from general PHY binding: the phandle for the PHY device.
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-phy-names:
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@ -16,9 +16,6 @@ Required properties:
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- reg: physical base address and length of the FIMD registers set.
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- interrupt-parent: should be the phandle of the fimd controller's
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parent interrupt controller.
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- interrupts: should contain a list of all FIMD IP block interrupts in the
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order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
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format depends on the interrupt controller used.
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@ -4,8 +4,6 @@ Holtek ht16k33 RAM mapping 16*8 LED controller driver with keyscan
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Required properties:
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- compatible: "holtek,ht16k33"
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- reg: I2C slave address of the chip.
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- interrupt-parent: A phandle pointing to the interrupt controller
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serving the interrupt for this chip.
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- interrupts: Interrupt specification for the key pressed interrupt.
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- refresh-rate-hz: Display update interval in HZ.
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- debounce-delay-ms: Debouncing interval time in milliseconds.
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@ -43,8 +43,6 @@ Optional properties:
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the master link of the 2-DSI panel.
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- qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is
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driving a 2-DSI panel whose 2 links need receive command simultaneously.
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- interrupt-parent: phandle to the MDP block if the interrupt signal is routed
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through MDP block
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- pinctrl-names: the pin control state names; should contain "default"
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- pinctrl-0: the default pinctrl state (active)
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- pinctrl-n: the "sleep" pinctrl state
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@ -25,10 +25,6 @@ Required properties:
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- panel-hpd-gpios: GPIO pin used for eDP hpd.
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Optional properties:
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- interrupt-parent: phandle to the MDP block if the interrupt signal is routed
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through MDP block
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Example:
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mdss_edp: qcom,mdss_edp@fd923400 {
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compatible = "qcom,mdss-edp";
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@ -41,8 +41,6 @@ Required properties:
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- reg-names: The names of register regions. The following regions are required:
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* "mdp_phys"
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- interrupts: Interrupt line from MDP5 to MDSS interrupt controller.
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- interrupt-parent: phandle to the MDSS block
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through MDP block
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- clocks: device clocks. See ../clocks/clock-bindings.txt for details.
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- clock-names: the following clocks are required.
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- * "bus"
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@ -19,7 +19,6 @@ Required Properties:
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- reg: the memory-mapped I/O registers base address and length
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifiers for the DU interrupts.
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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@ -9,8 +9,6 @@ Required properties:
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- First entry: System Configuration register
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- Second entry: IO space (Display Controller register)
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- interrupts : SMI interrupt to the cpu should be described here.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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Optional properties:
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- mode : select a video mode:
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@ -8,8 +8,6 @@ Required properties:
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- reg: base address and size of the LCDC device
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Recommended properties:
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- interrupt-parent: the phandle for the interrupt controller that
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services interrupts for this device.
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- ti,hwmods: Name of the hwmod associated to the LCDC
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Optional properties:
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@ -5,7 +5,6 @@ Required properties:
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- compatible: Should be "ingenic,jz4780-dma"
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- reg: Should contain the DMA controller registers location and length.
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- interrupts: Should contain the interrupt specifier of the DMA controller.
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- interrupt-parent: Should be the phandle of the interrupt controller that
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- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
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- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
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DMA clients (see below).
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@ -8,7 +8,6 @@ Required properties:
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- reg: Should contain DMA registers location and length. This should be
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a single entry that includes all of the per-channel registers in one
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contiguous bank.
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- interrupt-parent: Phandle to the interrupt parent controller.
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- interrupts: Should contain all of the per-channel DMA interrupts in
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ascending order with respect to the DMA channel index.
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- clocks: Must contain one entry for the ADMA module clock
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@ -5,8 +5,6 @@ Required properties:
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- reg: Address range of the DMAC registers. This should include
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all of the per-channel registers.
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- interrupt: Should contain the DMAC interrupt number.
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device.
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- dma-channels: Number of channels supported by hardware.
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- snps,dma-masters: Number of AXI masters supported by the hardware.
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- snps,data-width: Maximum AXI data width supported by hardware.
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@ -23,8 +23,6 @@ Deprecated properties:
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Optional properties:
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- is_private: The device channels should be marked as private and not for by the
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general purpose DMA channel allocator. False if not passed.
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- multi-block: Multi block transfers supported by hardware. Array property with
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@ -201,7 +201,6 @@ Required properties:
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- #dma-cells: Should be set to <1>
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Clients should use a single channel number per DMA request.
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- reg: Memory map for accessing module
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- interrupt-parent: Interrupt controller the interrupt is routed through
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- interrupts: Exactly 3 interrupts need to be specified in the order:
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1. Transfer completion interrupt.
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2. Memory protection interrupt.
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@ -5,7 +5,6 @@ control and rate control support for slave/peripheral dma access.
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Required properties:
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- compatible : Should be "xlnx,zynqmp-dma-1.0"
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- reg : Memory map for gdma/adma module access.
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- interrupt-parent : Interrupt controller the interrupt is routed through
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- interrupts : Should contain DMA channel interrupt.
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- xlnx,bus-width : Axi buswidth in bits. Should contain 128 or 64
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- clock-names : List of input clocks "clk_main", "clk_apb"
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@ -11,8 +11,6 @@ for USB D-/D+ switching.
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Required properties:
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- compatible: Should be "richtek,rt8973a-muic"
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- reg: Specifies the I2C slave address of the MUIC block. It should be 0x14
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- interrupt-parent: Specifies the phandle of the interrupt controller to which
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the interrupts from rt8973a are delivered to.
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- interrupts: Interrupt specifiers for detection interrupt sources.
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Example:
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||||
|
@ -9,8 +9,6 @@ the host controller using an I2C interface.
|
||||
Required properties:
|
||||
- compatible: Should be "siliconmitus,sm5502-muic"
|
||||
- reg: Specifies the I2C slave address of the MUIC block. It should be 0x25
|
||||
- interrupt-parent: Specifies the phandle of the interrupt controller to which
|
||||
the interrupts from sm5502 are delivered to.
|
||||
- interrupts: Interrupt specifiers for detection interrupt sources.
|
||||
|
||||
Example:
|
||||
|
@ -25,8 +25,6 @@ Required properties:
|
||||
- #gpio-cells: Should be two. The first cell is the pin number
|
||||
and the second cell is used to specify optional
|
||||
parameters (currently unused).
|
||||
- interrupt-parent: Phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- interrupts: Interrupt mapping for GPIO IRQ.
|
||||
- gpio-controller: Marks the port as GPIO controller.
|
||||
|
||||
|
@ -14,7 +14,6 @@ Optional Properties:
|
||||
- #interrupt-cells: Should be <1>. Interrupts are triggered on both edges.
|
||||
- interrupts: Defines the interrupt line connecting this GPIO controller to
|
||||
its parent interrupt controller.
|
||||
- interrupt-parent: Defines the parent interrupt controller.
|
||||
|
||||
GPIO ranges are specified as described in
|
||||
Documentation/devicetree/bindings/gpio/gpio.txt
|
||||
|
@ -30,9 +30,6 @@ Optional properties:
|
||||
- interrupts:
|
||||
The interrupt shared by all GPIO lines for this controller.
|
||||
|
||||
- interrupt-parent:
|
||||
phandle of the parent interrupt controller
|
||||
|
||||
- interrupts-extended:
|
||||
Alternate form of specifying interrupts and parents that allows for
|
||||
multiple parents. This takes precedence over 'interrupts' and
|
||||
|
@ -3,7 +3,6 @@ Avionic Design N-bit GPIO expander bindings
|
||||
Required properties:
|
||||
- compatible: should be "ad,gpio-adnp"
|
||||
- reg: The I2C slave address for this device.
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
- #gpio-cells: Should be 2. The first cell is the GPIO number and the
|
||||
second cell is used to specify optional parameters:
|
||||
|
@ -17,7 +17,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent : The parent interrupt controller, optional if inherited
|
||||
- clocks : A phandle to the clock to use for debounce timings
|
||||
|
||||
The gpio and interrupt properties are further described in their respective
|
||||
|
@ -12,7 +12,6 @@ Required properties:
|
||||
- ngpios: Should be set to the number of GPIOs available on the SoC.
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode interrupt
|
||||
|
@ -15,8 +15,6 @@ Required Properties:
|
||||
- first cell is the pin number
|
||||
- second cell is used to specify optional parameters (unused)
|
||||
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
|
||||
- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
|
||||
supported at a time.
|
||||
|
||||
|
@ -30,7 +30,6 @@ Optional properties:
|
||||
- #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
|
||||
- first cell is the pin number
|
||||
- second cell is used to specify flags
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
|
||||
Please refer to gpio.txt in this directory for details of the common GPIO
|
||||
|
@ -49,7 +49,6 @@ Optional Properties:
|
||||
|
||||
- interrupt-controller: Identifies the node as an interrupt controller.
|
||||
- #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
|
||||
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
- #gpio-cells: Should be 2. The first cell is the pin number and the second
|
||||
cell is used to specify optional parameters.
|
||||
- interrupt-parent: Specifies the parent interrupt controller.
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells: Should be 2. The first cell defines the interrupt number.
|
||||
The second cell bits[3:0] is used to specify trigger type as follows:
|
||||
|
@ -26,7 +26,6 @@ Required properties:
|
||||
1 = active low
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
- interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
|
||||
- interrupt-parent: Phandle of the parent interrupt controller.
|
||||
- interrupt-cells: Should be two.
|
||||
- first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.
|
||||
- second cell is used to specify flags.
|
||||
|
@ -14,8 +14,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
- interrupts : Interrupt mapping for GPIO IRQ.
|
||||
- interrupt-parent : Phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
|
||||
- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
|
||||
- xlnx,gpio-width : gpio width
|
||||
|
@ -30,7 +30,6 @@ Required properties:
|
||||
4 = active high level-sensitive.
|
||||
8 = active low level-sensitive.
|
||||
- interrupts: Interrupt number for this device.
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupt-controller: Identifies the node as an interrupt controller.
|
||||
|
||||
Example:
|
||||
|
@ -11,7 +11,6 @@ Required properties:
|
||||
- gpio-controller : Marks the device node as a GPIO controller.
|
||||
- interrupts : Interrupt specifier (see interrupt bindings for
|
||||
details)
|
||||
- interrupt-parent : Must be core interrupt controller
|
||||
- interrupt-controller : Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells : Should be 2. The first cell is the GPIO number.
|
||||
The second cell bits[3:0] is used to specify trigger type and level flags:
|
||||
|
@ -14,7 +14,6 @@ Optional properties:
|
||||
- #interrupt-cells: Should be two.
|
||||
- interrupts: Interrupt specifier for the controller's Broadway (PowerPC)
|
||||
interrupt.
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -31,7 +31,6 @@ Required Properties:
|
||||
- reg: Base address and length of each memory resource used by the GPIO
|
||||
controller hardware module.
|
||||
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifier for the controllers interrupt.
|
||||
|
||||
- gpio-controller: Marks the device node as a gpio controller.
|
||||
|
@ -25,7 +25,6 @@ controller.
|
||||
interrupt. Shall be set to 2. The first cell defines the interrupt number,
|
||||
the second encodes the triger flags encoded as described in
|
||||
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
- interrupt-parent : The parent interrupt controller.
|
||||
- interrupts : The interrupts to the parent controller raised when GPIOs
|
||||
generate the interrupts. If the controller provides one combined interrupt
|
||||
for all GPIOs, specify a single interrupt. If the controller provides one
|
||||
|
@ -33,7 +33,6 @@ Required Port sub-node properties:
|
||||
- reg-names: Contains the values "tx" and "rx" (in this order).
|
||||
- reg: Contains a matching register specifier for each entry
|
||||
in reg-names.
|
||||
- interrupt-parent Should be a phandle for the interrupt controller
|
||||
- interrupts: Should contain interrupt specifiers for mpu interrupts
|
||||
0 and 1 (in this order).
|
||||
- ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
|
||||
|
@ -11,9 +11,6 @@ Required Properties:
|
||||
- resets : phandle to reset controller with the reset number in
|
||||
the second cell
|
||||
- interrupts : interrupt number
|
||||
- interrupt-parent : interrupt controller for bus, should reference a
|
||||
aspeed,ast2400-i2c-ic or aspeed,ast2500-i2c-ic
|
||||
interrupt controller
|
||||
|
||||
Optional Properties:
|
||||
- bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not
|
||||
|
@ -10,8 +10,6 @@ Required properties:
|
||||
|
||||
Optional properties :
|
||||
|
||||
- interrupt-parent: specifies the phandle to the parent interrupt controller
|
||||
this one is cascaded from
|
||||
- interrupts: specifies the interrupt number, the irq line to be used
|
||||
- interrupt-names: Interrupt name string
|
||||
|
||||
|
@ -5,7 +5,6 @@ Required properties:
|
||||
- "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
|
||||
- "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc
|
||||
- reg : address and length of the lpi2c master registers
|
||||
- interrupt-parent : core interrupt controller
|
||||
- interrupts : lpi2c interrupt
|
||||
- clocks : lpi2c clock specifier
|
||||
|
||||
|
@ -11,10 +11,6 @@ Recommended properties:
|
||||
- pinctrl-names: should be "default";
|
||||
- pinctrl-0: phandle to pinctrl function
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent: Should be the phandle of the interrupt controller that
|
||||
delivers interrupts to the I2C block.
|
||||
|
||||
Example
|
||||
|
||||
/ {
|
||||
|
@ -15,8 +15,6 @@ Recommended properties :
|
||||
information for the interrupt. This should be encoded based on
|
||||
the information in section 2) depending on the type of interrupt
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- fsl,preserve-clocking : boolean; if defined, the clock settings
|
||||
from the bootloader are preserved (not touched).
|
||||
- clock-frequency : desired I2C bus clock frequency in Hz.
|
||||
|
@ -28,8 +28,6 @@ Optional Properties:
|
||||
- i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
|
||||
children in idle state. This is necessary for example, if there are several
|
||||
multiplexers on the bus and the devices behind them use same I2C addresses.
|
||||
- interrupt-parent: Phandle for the interrupt controller that services
|
||||
interrupts for this device.
|
||||
- interrupts: Interrupt mapping for IRQ.
|
||||
- interrupt-controller: Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells : Should be two.
|
||||
|
@ -12,8 +12,6 @@ Required properties :
|
||||
|
||||
Optional properties
|
||||
- interrupts : the interrupt number
|
||||
- interrupt-parent : the phandle for the interrupt controller.
|
||||
If an interrupt is not specified polling will be used.
|
||||
- reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line
|
||||
is active low, it should be marked GPIO_ACTIVE_LOW.
|
||||
- clock-frequency : I2C bus frequency.
|
||||
|
@ -7,8 +7,6 @@ Required properties:
|
||||
- interrupts: configure one interrupt line
|
||||
- #address-cells: always 1 (for i2c addresses)
|
||||
- #size-cells: always 0
|
||||
- interrupt-parent: the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
|
||||
Optional properties:
|
||||
|
||||
|
@ -12,9 +12,6 @@ Required properties :
|
||||
Recommended properties :
|
||||
|
||||
- interrupts : the interrupt number
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device. If the parent is the default
|
||||
interrupt controller in device tree, it could be ignored.
|
||||
- mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
|
||||
status register of i2c controller instead.
|
||||
- mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
|
||||
|
@ -11,8 +11,6 @@ Required properties for SPI bus usage:
|
||||
- spi-cpol and spi-cpha : must be defined for adxl345 to enable SPI mode 3
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent : phandle to the parent interrupt controller as documented
|
||||
in Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
- interrupts: interrupt mapping for IRQ as documented in
|
||||
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
|
||||
|
@ -10,8 +10,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
|
||||
- interrupts : interrupt mapping for GPIO IRQ, it should by configured with
|
||||
flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING
|
||||
For the bma250 the first interrupt listed must be the one
|
||||
|
@ -15,8 +15,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
|
||||
- interrupts: interrupt mapping for GPIO IRQ
|
||||
|
||||
- interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's
|
||||
|
@ -2,7 +2,6 @@ Motorola CPCAP PMIC ADC binding
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc"
|
||||
- interrupt-parent: The interrupt controller
|
||||
- interrupts: The interrupt number for the ADC device
|
||||
- interrupt-names: Should be "adcdone"
|
||||
- #io-channel-cells: Number of cells in an IIO specifier
|
||||
|
@ -8,7 +8,6 @@ Required properties:
|
||||
- reg: Should be the register range of the module.
|
||||
- interrupts: Should be the interrupt number of the module.
|
||||
Typically this is <1>.
|
||||
- interrupt-parent: phandle to the tsadc module of the i.MX25.
|
||||
- #address-cells: Should be <1> (setting for the subnodes)
|
||||
- #size-cells: Should be <0> (setting for the subnodes)
|
||||
|
||||
|
@ -3,8 +3,6 @@
|
||||
Required properties:
|
||||
- compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031"
|
||||
- reg: SPI chip select number for the device
|
||||
- interrupt-parent: phandle to the parent interrupt controller
|
||||
see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
- interrupts: IRQ line for the ADC
|
||||
see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
|
||||
|
@ -60,7 +60,6 @@ Required properties:
|
||||
- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200).
|
||||
- clocks: Input clock private to this ADC instance. It's required only on
|
||||
stm32f4, that has per instance clock input for registers access.
|
||||
- interrupt-parent: Phandle to the parent interrupt controller.
|
||||
- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or
|
||||
2 for adc@200).
|
||||
- st,adc-channels: List of single-ended channels muxed for this ADC.
|
||||
|
@ -22,7 +22,6 @@ Required properties:
|
||||
clock to the AXI bus interface of the core.
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent: phandle to the parent interrupt controller
|
||||
- xlnx,external-mux:
|
||||
* "none": No external multiplexer is used, this is the default
|
||||
if the property is omitted.
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
|
||||
- compatible: must be "atlas,ec-sm"
|
||||
- reg: the I2C address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
|
||||
- compatible: must be "atlas,orp-sm"
|
||||
- reg: the I2C address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
|
||||
- compatible: must be "atlas,ph-sm"
|
||||
- reg: the I2C address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -5,7 +5,6 @@ Required properties:
|
||||
- reg : the I2C address of the sensor
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
- interrupts : interrupt mapping for the trigger interrupt from the
|
||||
internal oscillator. The following IRQ modes are supported:
|
||||
IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and
|
||||
|
@ -4,7 +4,6 @@ Required properties:
|
||||
- compatible : Should be "ti,afe4403".
|
||||
- reg : SPI chip select address of device.
|
||||
- tx-supply : Regulator supply to transmitting LEDs.
|
||||
- interrupt-parent : Phandle to he parent interrupt controller.
|
||||
- interrupts : The interrupt line the device ADC_RDY pin is
|
||||
connected to. For details refer to,
|
||||
../../interrupt-controller/interrupts.txt.
|
||||
|
@ -4,7 +4,6 @@ Required properties:
|
||||
- compatible : Should be "ti,afe4404".
|
||||
- reg : I2C address of the device.
|
||||
- tx-supply : Regulator supply to transmitting LEDs.
|
||||
- interrupt-parent : Phandle to he parent interrupt controller.
|
||||
- interrupts : The interrupt line the device ADC_RDY pin is
|
||||
connected to. For details refer to,
|
||||
../interrupt-controller/interrupts.txt.
|
||||
|
@ -5,7 +5,6 @@ Maxim MAX30100 heart rate and pulse oximeter sensor
|
||||
Required properties:
|
||||
- compatible: must be "maxim,max30100"
|
||||
- reg: the I2C address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic
|
||||
|
@ -7,7 +7,6 @@ Maxim MAX30105 optical particle-sensing module
|
||||
Required properties:
|
||||
- compatible: must be "maxim,max30102" or "maxim,max30105"
|
||||
- reg: the I2C address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic
|
||||
|
@ -13,7 +13,6 @@ Optional properties:
|
||||
when it is not active, whereas a pull-up one is needed when interrupt
|
||||
line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING.
|
||||
Refer to pinctrl/pinctrl-bindings.txt for the property description.
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for IRQ. It should be configured with
|
||||
flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
|
||||
IRQ_TYPE_EDGE_FALLING.
|
||||
|
@ -9,7 +9,6 @@ Required properties:
|
||||
- spi-max-frequency : set maximum clock frequency (only for SPI)
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent : should be the phandle of the interrupt controller
|
||||
- interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW
|
||||
- interrupt-names : set to "INT1" if INT1 pin should be used as interrupt
|
||||
input, set to "INT2" if INT2 pin should be used instead
|
||||
|
@ -11,7 +11,6 @@ Required properties:
|
||||
"invensense,mpu9255"
|
||||
"invensense,icm20608"
|
||||
- reg : the I2C address of the sensor
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for IRQ. It should be configured with flags
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
|
||||
IRQ_TYPE_EDGE_FALLING.
|
||||
|
@ -20,7 +20,6 @@ Optional properties:
|
||||
IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line
|
||||
when it is not active, whereas a pull-up one is needed when interrupt
|
||||
line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING.
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for IRQ. It should be configured with
|
||||
flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
|
||||
IRQ_TYPE_EDGE_FALLING.
|
||||
|
@ -9,7 +9,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
- interrupts : interrupt mapping for GPIO IRQ
|
||||
|
||||
Example:
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
|
||||
- compatible: must be "avago,apds9960"
|
||||
- reg: the I2c address of the sensor
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts : the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -10,7 +10,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -13,7 +13,6 @@ Required properties:
|
||||
- reg: the I2C address of the sensor
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for GPIO IRQ (configure for falling edge)
|
||||
|
||||
Example:
|
||||
|
@ -10,7 +10,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client
|
||||
|
@ -5,7 +5,6 @@ Required properties:
|
||||
- reg: i2c address of the sensor / spi cs line
|
||||
|
||||
Optional properties:
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for IRQ. It should be configured with
|
||||
flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
|
||||
IRQ_TYPE_EDGE_FALLING.
|
||||
|
@ -9,7 +9,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent : phandle to the parent interrupt controller
|
||||
- interrupts : interrupt mapping for GPIO IRQ
|
||||
|
||||
Example:
|
||||
|
@ -12,7 +12,6 @@ Optional properties:
|
||||
- temp-measurement-period: temperature measurement period (milliseconds)
|
||||
- default-oversampling: default oversampling value to be used at startup,
|
||||
value range is 0-3 with rising sensitivity.
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
- interrupts: interrupt mapping for IRQ
|
||||
- reset-gpios: a GPIO line handling reset of the sensor: as the line is
|
||||
active low, it should be marked GPIO_ACTIVE_LOW (see gpio/gpio.txt)
|
||||
|
Before Width: | Height: | Size: 1.1 KiB After Width: | Height: | Size: 1.1 KiB |
@ -15,8 +15,6 @@ Optional properties:
|
||||
power to the sensor
|
||||
- vdd-supply: an optional regulator that needs to be on to provide VDD
|
||||
power to the sensor
|
||||
- interrupt-parent: phandle to the parent interrupt controller as documented in
|
||||
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
- interrupts: interrupt mapping for IRQ as documented in
|
||||
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
|
||||
|
@ -6,7 +6,6 @@ Required properties:
|
||||
- spi-max-frequency: specifies maximum SPI clock frequency
|
||||
- spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI
|
||||
slave node bindings.
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
- interrupts : the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic
|
||||
|
@ -3,7 +3,6 @@ Semtech's SX9500 capacitive proximity button device driver
|
||||
Required properties:
|
||||
- compatible: must be "semtech,sx9500"
|
||||
- reg: i2c address where to find the device
|
||||
- interrupt-parent : should be the phandle for the interrupt controller
|
||||
- interrupts : the sole interrupt generated by the device
|
||||
|
||||
Refer to interrupt-controller/interrupts.txt for generic
|
||||
|
@ -6,7 +6,6 @@ of a virtual sensor device.
|
||||
Required properties:
|
||||
- compatible: "samsung,sensorhub-rinato" or "samsung,sensorhub-thermostat"
|
||||
- spi-max-frequency: max SPI clock frequency
|
||||
- interrupt-parent: interrupt parent
|
||||
- interrupts: communication interrupt
|
||||
- ap-mcu-gpios: [out] ap to sensorhub line - used during communication
|
||||
- mcu-ap-gpios: [in] sensorhub to ap - used during communication
|
||||
|
@ -20,8 +20,6 @@ Required properties:
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupt-parent: should be the phandle for the interrupt controller
|
||||
|
||||
- interrupts: interrupt mapping for GPIO IRQ (level active low)
|
||||
|
||||
Example:
|
||||
|
@ -19,7 +19,6 @@ representing a dsaf device.
|
||||
- #size-cells: must be 2
|
||||
Optional properties:
|
||||
- dma-coherent: Present if DMA operations are coherent.
|
||||
- interrupt-parent: the interrupt parent of this device.
|
||||
- interrupts: should contain 32 completion event irq,1 async event irq
|
||||
and 1 event overflow irq.
|
||||
- interrupt-names:should be one of 34 irqs for roce device
|
||||
|
@ -3,8 +3,6 @@ Cypress I2C Touchpad
|
||||
Required properties:
|
||||
- compatible: must be "cypress,cyapa".
|
||||
- reg: I2C address of the chip.
|
||||
- interrupt-parent: a phandle for the interrupt controller (see interrupt
|
||||
binding[0]).
|
||||
- interrupts: interrupt to which the chip is connected (see interrupt
|
||||
binding[0]).
|
||||
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue
Block a user