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net: phy: dp83869: Fix return paths to return proper values
Fix the return paths for all I/O operations to ensure
that the I/O completed successfully. Then pass the return
to the caller for further processing
Fixes: 01db923e83
("net: phy: dp83869: Add TI dp83869 phy")
Reported-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
7eb9d7675c
commit
786c4a5372
@ -151,13 +151,13 @@ static int dp83869_config_port_mirroring(struct phy_device *phydev)
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struct dp83869_private *dp83869 = phydev->priv;
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if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
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phy_set_bits_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3,
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DP83869_CFG3_PORT_MIRROR_EN);
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return phy_set_bits_mmd(phydev, DP83869_DEVADDR,
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DP83869_GEN_CFG3,
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DP83869_CFG3_PORT_MIRROR_EN);
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else
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phy_clear_bits_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3,
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DP83869_CFG3_PORT_MIRROR_EN);
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return 0;
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return phy_clear_bits_mmd(phydev, DP83869_DEVADDR,
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DP83869_GEN_CFG3,
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DP83869_CFG3_PORT_MIRROR_EN);
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}
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#ifdef CONFIG_OF_MDIO
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@ -204,7 +204,7 @@ static int dp83869_of_init(struct phy_device *phydev)
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&dp83869->tx_fifo_depth))
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dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;
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return 0;
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return ret;
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}
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#else
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static int dp83869_of_init(struct phy_device *phydev)
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@ -216,7 +216,7 @@ static int dp83869_of_init(struct phy_device *phydev)
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static int dp83869_configure_rgmii(struct phy_device *phydev,
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struct dp83869_private *dp83869)
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{
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int ret, val;
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int ret = 0, val;
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if (phy_interface_is_rgmii(phydev)) {
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val = phy_read(phydev, MII_DP83869_PHYCTRL);
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@ -233,13 +233,13 @@ static int dp83869_configure_rgmii(struct phy_device *phydev,
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}
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if (dp83869->io_impedance >= 0)
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phy_modify_mmd(phydev, DP83869_DEVADDR,
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DP83869_IO_MUX_CFG,
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DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL,
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dp83869->io_impedance &
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DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
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ret = phy_modify_mmd(phydev, DP83869_DEVADDR,
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DP83869_IO_MUX_CFG,
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DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL,
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dp83869->io_impedance &
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DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
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return 0;
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return ret;
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}
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static int dp83869_configure_mode(struct phy_device *phydev,
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@ -284,9 +284,11 @@ static int dp83869_configure_mode(struct phy_device *phydev,
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return ret;
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break;
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case DP83869_RGMII_SGMII_BRIDGE:
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phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
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DP83869_SGMII_RGMII_BRIDGE,
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DP83869_SGMII_RGMII_BRIDGE);
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ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
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DP83869_SGMII_RGMII_BRIDGE,
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DP83869_SGMII_RGMII_BRIDGE);
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if (ret)
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return ret;
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ret = phy_write_mmd(phydev, DP83869_DEVADDR,
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DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
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@ -334,7 +336,7 @@ static int dp83869_configure_mode(struct phy_device *phydev,
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return -EINVAL;
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};
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return 0;
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return ret;
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}
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static int dp83869_config_init(struct phy_device *phydev)
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@ -358,12 +360,13 @@ static int dp83869_config_init(struct phy_device *phydev)
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/* Clock output selection if muxing property is set */
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if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK)
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phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_IO_MUX_CFG,
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DP83869_IO_MUX_CFG_CLK_O_SEL_MASK,
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dp83869->clk_output_sel <<
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DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT);
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ret = phy_modify_mmd(phydev,
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DP83869_DEVADDR, DP83869_IO_MUX_CFG,
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DP83869_IO_MUX_CFG_CLK_O_SEL_MASK,
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dp83869->clk_output_sel <<
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DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT);
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return 0;
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return ret;
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}
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static int dp83869_probe(struct phy_device *phydev)
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