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drm/stm: ltdc: filter mode pixel clock vs pad constraint
Filter the requested mode pixel clock frequency according to the pad maximum supported frequency. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Tested-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/1530271342-5532-1-git-send-email-yannick.fertre@st.com
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@ -457,6 +457,14 @@ ltdc_crtc_mode_valid(struct drm_crtc *crtc,
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int target_max = target + CLK_TOLERANCE_HZ;
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int result;
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result = clk_round_rate(ldev->pixel_clk, target);
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DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result);
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/* Filter modes according to the max frequency supported by the pads */
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if (result > ldev->caps.pad_max_freq_hz)
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return MODE_CLOCK_HIGH;
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/*
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* Accept all "preferred" modes:
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* - this is important for panels because panel clock tolerances are
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@ -468,10 +476,6 @@ ltdc_crtc_mode_valid(struct drm_crtc *crtc,
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if (mode->type & DRM_MODE_TYPE_PREFERRED)
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return MODE_OK;
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result = clk_round_rate(ldev->pixel_clk, target);
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DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result);
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/*
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* Filter modes according to the clock value, particularly useful for
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* hdmi modes that require precise pixel clocks.
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@ -991,11 +995,15 @@ static int ltdc_get_caps(struct drm_device *ddev)
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* does not work on 2nd layer.
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*/
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ldev->caps.non_alpha_only_l1 = true;
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ldev->caps.pad_max_freq_hz = 90000000;
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if (ldev->caps.hw_version == HWVER_10200)
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ldev->caps.pad_max_freq_hz = 65000000;
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break;
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case HWVER_20101:
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ldev->caps.reg_ofs = REG_OFS_4;
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ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1;
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ldev->caps.non_alpha_only_l1 = false;
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ldev->caps.pad_max_freq_hz = 150000000;
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break;
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default:
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return -ENODEV;
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@ -18,6 +18,7 @@ struct ltdc_caps {
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u32 bus_width; /* bus width (32 or 64 bits) */
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const u32 *pix_fmt_hw; /* supported pixel formats */
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bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */
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int pad_max_freq_hz; /* max frequency supported by pad */
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};
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#define LTDC_MAX_LAYER 4
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