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myri10ge: add routines for multislices
Add several routines that multislices support will use. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Andrew Gallatin <gallatin@myri.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Brice Goglin
Jeff Garzik
parent
a5b17df04c
commit
779297320d
@ -1928,6 +1928,76 @@ myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
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return 0;
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}
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#if 0
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static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice)
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{
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struct myri10ge_cmd cmd;
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struct myri10ge_slice_state *ss;
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int status;
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ss = &mgp->ss[slice];
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cmd.data0 = 0; /* single slice for now */
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status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
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ss->tx.lanai = (struct mcp_kreq_ether_send __iomem *)
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(mgp->sram + cmd.data0);
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cmd.data0 = slice;
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status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET,
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&cmd, 0);
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ss->rx_small.lanai = (struct mcp_kreq_ether_recv __iomem *)
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(mgp->sram + cmd.data0);
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cmd.data0 = slice;
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status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
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ss->rx_big.lanai = (struct mcp_kreq_ether_recv __iomem *)
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(mgp->sram + cmd.data0);
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if (myri10ge_wcfifo && mgp->wc_enabled) {
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ss->tx.wc_fifo = (u8 __iomem *)
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mgp->sram + MXGEFW_ETH_SEND_4 + 64 * slice;
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ss->rx_small.wc_fifo = (u8 __iomem *)
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mgp->sram + MXGEFW_ETH_RECV_SMALL + 64 * slice;
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ss->rx_big.wc_fifo = (u8 __iomem *)
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mgp->sram + MXGEFW_ETH_RECV_BIG + 64 * slice;
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} else {
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ss->tx.wc_fifo = NULL;
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ss->rx_small.wc_fifo = NULL;
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ss->rx_big.wc_fifo = NULL;
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}
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return status;
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}
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static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice)
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{
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struct myri10ge_cmd cmd;
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struct myri10ge_slice_state *ss;
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int status;
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ss = &mgp->ss[slice];
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cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->fw_stats_bus);
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cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->fw_stats_bus);
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cmd.data2 = sizeof(struct mcp_irq_data);
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status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
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if (status == -ENOSYS) {
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dma_addr_t bus = ss->fw_stats_bus;
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if (slice != 0)
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return -EINVAL;
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bus += offsetof(struct mcp_irq_data, send_done_count);
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cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
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cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
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status = myri10ge_send_cmd(mgp,
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MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
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&cmd, 0);
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/* Firmware cannot support multicast without STATS_DMA_V2 */
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mgp->fw_multicast_support = 0;
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} else {
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mgp->fw_multicast_support = 1;
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}
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return 0;
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}
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#endif
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static int myri10ge_open(struct net_device *dev)
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{
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struct myri10ge_priv *mgp = netdev_priv(dev);
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@ -3106,6 +3176,192 @@ static void myri10ge_watchdog_timer(unsigned long arg)
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mgp->watchdog_pause = rx_pause_cnt;
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}
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#if 0
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static void myri10ge_free_slices(struct myri10ge_priv *mgp)
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{
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struct myri10ge_slice_state *ss;
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struct pci_dev *pdev = mgp->pdev;
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size_t bytes;
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int i;
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if (mgp->ss == NULL)
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return;
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for (i = 0; i < mgp->num_slices; i++) {
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ss = &mgp->ss[i];
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if (ss->rx_done.entry != NULL) {
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bytes = mgp->max_intr_slots *
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sizeof(*ss->rx_done.entry);
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dma_free_coherent(&pdev->dev, bytes,
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ss->rx_done.entry, ss->rx_done.bus);
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ss->rx_done.entry = NULL;
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}
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if (ss->fw_stats != NULL) {
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bytes = sizeof(*ss->fw_stats);
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dma_free_coherent(&pdev->dev, bytes,
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ss->fw_stats, ss->fw_stats_bus);
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ss->fw_stats = NULL;
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}
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}
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kfree(mgp->ss);
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mgp->ss = NULL;
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}
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static int myri10ge_alloc_slices(struct myri10ge_priv *mgp)
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{
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struct myri10ge_slice_state *ss;
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struct pci_dev *pdev = mgp->pdev;
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size_t bytes;
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int i;
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bytes = sizeof(*mgp->ss) * mgp->num_slices;
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mgp->ss = kzalloc(bytes, GFP_KERNEL);
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if (mgp->ss == NULL) {
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return -ENOMEM;
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}
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for (i = 0; i < mgp->num_slices; i++) {
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ss = &mgp->ss[i];
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bytes = mgp->max_intr_slots * sizeof(*ss->rx_done.entry);
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ss->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
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&ss->rx_done.bus,
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GFP_KERNEL);
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if (ss->rx_done.entry == NULL)
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goto abort;
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memset(ss->rx_done.entry, 0, bytes);
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bytes = sizeof(*ss->fw_stats);
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ss->fw_stats = dma_alloc_coherent(&pdev->dev, bytes,
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&ss->fw_stats_bus,
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GFP_KERNEL);
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if (ss->fw_stats == NULL)
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goto abort;
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ss->mgp = mgp;
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ss->dev = mgp->dev;
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netif_napi_add(ss->dev, &ss->napi, myri10ge_poll,
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myri10ge_napi_weight);
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}
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return 0;
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abort:
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myri10ge_free_slices(mgp);
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return -ENOMEM;
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}
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/*
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* This function determines the number of slices supported.
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* The number slices is the minumum of the number of CPUS,
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* the number of MSI-X irqs supported, the number of slices
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* supported by the firmware
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*/
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static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
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{
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struct myri10ge_cmd cmd;
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struct pci_dev *pdev = mgp->pdev;
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char *old_fw;
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int i, status, ncpus, msix_cap;
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mgp->num_slices = 1;
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msix_cap = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
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ncpus = num_online_cpus();
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if (myri10ge_max_slices == 1 || msix_cap == 0 ||
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(myri10ge_max_slices == -1 && ncpus < 2))
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return;
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/* try to load the slice aware rss firmware */
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old_fw = mgp->fw_name;
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if (old_fw == myri10ge_fw_aligned)
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mgp->fw_name = myri10ge_fw_rss_aligned;
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else
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mgp->fw_name = myri10ge_fw_rss_unaligned;
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status = myri10ge_load_firmware(mgp, 0);
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if (status != 0) {
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dev_info(&pdev->dev, "Rss firmware not found\n");
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return;
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}
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/* hit the board with a reset to ensure it is alive */
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memset(&cmd, 0, sizeof(cmd));
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status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
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if (status != 0) {
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dev_err(&mgp->pdev->dev, "failed reset\n");
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goto abort_with_fw;
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return;
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}
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mgp->max_intr_slots = cmd.data0 / sizeof(struct mcp_slot);
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/* tell it the size of the interrupt queues */
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cmd.data0 = mgp->max_intr_slots * sizeof(struct mcp_slot);
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status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
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if (status != 0) {
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dev_err(&mgp->pdev->dev, "failed MXGEFW_CMD_SET_INTRQ_SIZE\n");
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goto abort_with_fw;
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}
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/* ask the maximum number of slices it supports */
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status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES, &cmd, 0);
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if (status != 0)
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goto abort_with_fw;
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else
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mgp->num_slices = cmd.data0;
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/* Only allow multiple slices if MSI-X is usable */
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if (!myri10ge_msi) {
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goto abort_with_fw;
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}
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/* if the admin did not specify a limit to how many
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* slices we should use, cap it automatically to the
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* number of CPUs currently online */
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if (myri10ge_max_slices == -1)
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myri10ge_max_slices = ncpus;
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if (mgp->num_slices > myri10ge_max_slices)
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mgp->num_slices = myri10ge_max_slices;
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/* Now try to allocate as many MSI-X vectors as we have
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* slices. We give up on MSI-X if we can only get a single
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* vector. */
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mgp->msix_vectors = kzalloc(mgp->num_slices *
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sizeof(*mgp->msix_vectors), GFP_KERNEL);
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if (mgp->msix_vectors == NULL)
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goto disable_msix;
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for (i = 0; i < mgp->num_slices; i++) {
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mgp->msix_vectors[i].entry = i;
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}
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while (mgp->num_slices > 1) {
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/* make sure it is a power of two */
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while (!is_power_of_2(mgp->num_slices))
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mgp->num_slices--;
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if (mgp->num_slices == 1)
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goto disable_msix;
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status = pci_enable_msix(pdev, mgp->msix_vectors,
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mgp->num_slices);
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if (status == 0) {
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pci_disable_msix(pdev);
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return;
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}
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if (status > 0)
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mgp->num_slices = status;
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else
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goto disable_msix;
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}
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disable_msix:
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if (mgp->msix_vectors != NULL) {
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kfree(mgp->msix_vectors);
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mgp->msix_vectors = NULL;
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}
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abort_with_fw:
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mgp->num_slices = 1;
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mgp->fw_name = old_fw;
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myri10ge_load_firmware(mgp, 0);
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}
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#endif
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static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct net_device *netdev;
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