This allows that device tree enables platform to setup a runtime IO mapping for the chip id

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Merge tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into late/dt

From Kukjin Kim:
This allows that device tree enables platform to setup a runtime IO
mapping for the chip id

* tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-04-28 12:24:08 -07:00
commit 775c4f66fd
4 changed files with 40 additions and 24 deletions

View File

@ -38,6 +38,11 @@
i2c7 = &i2c_7; i2c7 = &i2c_7;
}; };
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
pd_mfc: mfc-power-domain@10023C40 { pd_mfc: mfc-power-domain@10023C40 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>; reg = <0x10023C40 0x20>;

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@ -51,6 +51,11 @@
pinctrl3 = &pinctrl_3; pinctrl3 = &pinctrl_3;
}; };
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
pd_gsc: gsc-power-domain@0x10044000 { pd_gsc: gsc-power-domain@0x10044000 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>; reg = <0x10044000 0x20>;

View File

@ -119,17 +119,6 @@ static struct map_desc exynos_iodesc[] __initdata = {
}, },
}; };
#ifdef CONFIG_ARCH_EXYNOS5
static struct map_desc exynos5440_iodesc[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_CHIPID,
.pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID),
.length = SZ_4K,
.type = MT_DEVICE,
},
};
#endif
static struct map_desc exynos4_iodesc[] __initdata = { static struct map_desc exynos4_iodesc[] __initdata = {
{ {
.virtual = (unsigned long)S3C_VA_SYS, .virtual = (unsigned long)S3C_VA_SYS,
@ -320,6 +309,31 @@ void __init exynos_init_late(void)
exynos_pm_late_initcall(); exynos_pm_late_initcall();
} }
#ifdef CONFIG_OF
int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data)
{
struct map_desc iodesc;
__be32 *reg;
unsigned long len;
if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
return 0;
reg = of_get_flat_dt_prop(node, "reg", &len);
if (reg == NULL || len != (sizeof(unsigned long) * 2))
return 0;
iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
iodesc.length = be32_to_cpu(reg[1]) - 1;
iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
iodesc.type = MT_DEVICE;
iotable_init(&iodesc, 1);
return 1;
}
#endif
/* /*
* exynos_map_io * exynos_map_io
* *
@ -328,19 +342,12 @@ void __init exynos_init_late(void)
void __init exynos_init_io(struct map_desc *mach_desc, int size) void __init exynos_init_io(struct map_desc *mach_desc, int size)
{ {
struct map_desc *iodesc = exynos_iodesc; #ifdef CONFIG_OF
int iodesc_sz = ARRAY_SIZE(exynos_iodesc); if (initial_boot_params)
#if defined(CONFIG_OF) && defined(CONFIG_ARCH_EXYNOS5) of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
unsigned long root = of_get_flat_dt_root(); else
/* initialize the io descriptors we need for initialization */
if (of_flat_dt_is_compatible(root, "samsung,exynos5440")) {
iodesc = exynos5440_iodesc;
iodesc_sz = ARRAY_SIZE(exynos5440_iodesc);
}
#endif #endif
iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
iotable_init(iodesc, iodesc_sz);
if (mach_desc) if (mach_desc)
iotable_init(mach_desc, size); iotable_init(mach_desc, size);

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@ -53,7 +53,6 @@
#define EXYNOS4_PA_ONENAND_DMA 0x0C600000 #define EXYNOS4_PA_ONENAND_DMA 0x0C600000
#define EXYNOS_PA_CHIPID 0x10000000 #define EXYNOS_PA_CHIPID 0x10000000
#define EXYNOS5440_PA_CHIPID 0x00160000
#define EXYNOS4_PA_SYSCON 0x10010000 #define EXYNOS4_PA_SYSCON 0x10010000
#define EXYNOS5_PA_SYSCON 0x10050100 #define EXYNOS5_PA_SYSCON 0x10050100