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arm64: dts: ti: k3-j721e-main: Add DSS node
Add DSS node for J721E SoC. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -736,6 +736,63 @@
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};
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};
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dss: dss@04a00000 {
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compatible = "ti,j721e-dss";
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reg =
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<0x00 0x04a00000 0x00 0x10000>, /* common_m */
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<0x00 0x04a10000 0x00 0x10000>, /* common_s0*/
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<0x00 0x04b00000 0x00 0x10000>, /* common_s1*/
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<0x00 0x04b10000 0x00 0x10000>, /* common_s2*/
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<0x00 0x04a20000 0x00 0x10000>, /* vidl1 */
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<0x00 0x04a30000 0x00 0x10000>, /* vidl2 */
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<0x00 0x04a50000 0x00 0x10000>, /* vid1 */
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<0x00 0x04a60000 0x00 0x10000>, /* vid2 */
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<0x00 0x04a70000 0x00 0x10000>, /* ovr1 */
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<0x00 0x04a90000 0x00 0x10000>, /* ovr2 */
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<0x00 0x04ab0000 0x00 0x10000>, /* ovr3 */
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<0x00 0x04ad0000 0x00 0x10000>, /* ovr4 */
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<0x00 0x04a80000 0x00 0x10000>, /* vp1 */
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<0x00 0x04aa0000 0x00 0x10000>, /* vp2 */
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<0x00 0x04ac0000 0x00 0x10000>, /* vp3 */
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<0x00 0x04ae0000 0x00 0x10000>, /* vp4 */
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<0x00 0x04af0000 0x00 0x10000>; /* wb */
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reg-names = "common_m", "common_s0",
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"common_s1", "common_s2",
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"vidl1", "vidl2","vid1","vid2",
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"ovr1", "ovr2", "ovr3", "ovr4",
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"vp1", "vp2", "vp3", "vp4",
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"wb";
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clocks = <&k3_clks 152 0>,
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<&k3_clks 152 1>,
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<&k3_clks 152 4>,
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<&k3_clks 152 9>,
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<&k3_clks 152 13>;
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clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
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power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
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interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "common_m",
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"common_s0",
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"common_s1",
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"common_s2";
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status = "disabled";
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dss_ports: ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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mcasp0: mcasp@2b00000 {
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mcasp0: mcasp@2b00000 {
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compatible = "ti,am33xx-mcasp-audio";
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compatible = "ti,am33xx-mcasp-audio";
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reg = <0x0 0x02b00000 0x0 0x2000>,
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reg = <0x0 0x02b00000 0x0 0x2000>,
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