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MIPS changes for 4.18
These are the main MIPS changes for 4.18. Rough overview:
(1) MAINTAINERS: Add Paul Burton as MIPS co-maintainer
(2) Misc: Generic compiler intrinsics, Y2038 improvements, Perf+MT fixes
(3) Platform support: Netgear WNR1000 V3, Microsemi Ocelot integrated
switch, Ingenic watchdog cleanups
Maintainers:
- Add Paul Burton as MIPS co-maintainer
Miscellaneous:
- Use generic GCC library routines from lib/
- Add notrace to generic ucmpdi2 implementation
- Rename compiler intrinsic selects to GENERIC_LIB_*
- vmlinuz: Use generic ashldi3
- y2038: Convert update/read_persistent_clock() to *_clock64()
- sni: Remove read_persistent_clock()
- perf: Fix perf with MT counting other threads
- Probe for per-TC perf counters in cpu-probe.c
- Use correct VPE ID for VPE tracing
Minor cleanups:
- Avoid unneeded built-in.a in DTS dirs
- sc-debugfs: Re-use kstrtobool_from_user
- memset.S: Reinstate delay slot indentation
- VPE: Fix spelling "uneeded" -> "Unneeded"
Platform support:
BCM47xx:
- Add support for Netgear WNR1000 V3
- firmware: Support small NVRAM partitions
- Use __initdata for LEDs platform data
Ingenic:
- Watchdog driver & platform code improvements:
- Disable clock after stopping counter
- Use devm_* functions
- Drop module remove function
- Move platform reset code to restart handler in driver
- JZ4740: Convert watchdog instantiation to DT
- JZ4780: Fix watchdog DT node
- qi_lb60_defconfig: Enable watchdog driver
Microsemi:
- Ocelot: Add support for integrated switch
- pcb123: Connect phys to ports
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Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from James Hogan:
"These are the main MIPS changes for 4.18.
Rough overview:
- MAINTAINERS: Add Paul Burton as MIPS co-maintainer
- Misc: Generic compiler intrinsics, Y2038 improvements, Perf+MT fixes
- Platform support: Netgear WNR1000 V3, Microsemi Ocelot integrated
switch, Ingenic watchdog cleanups
More detailed summary:
Maintainers:
- Add Paul Burton as MIPS co-maintainer, as I soon won't have access
to much MIPS hardware, nor enough time to properly maintain MIPS on
my own.
Miscellaneous:
- Use generic GCC library routines from lib/
- Add notrace to generic ucmpdi2 implementation
- Rename compiler intrinsic selects to GENERIC_LIB_*
- vmlinuz: Use generic ashldi3
- y2038: Convert update/read_persistent_clock() to *_clock64()
- sni: Remove read_persistent_clock()
- perf: Fix perf with MT counting other threads
- Probe for per-TC perf counters in cpu-probe.c
- Use correct VPE ID for VPE tracing
Minor cleanups:
- Avoid unneeded built-in.a in DTS dirs
- sc-debugfs: Re-use kstrtobool_from_user
- memset.S: Reinstate delay slot indentation
- VPE: Fix spelling "uneeded" -> "Unneeded"
Platform support:
BCM47xx:
- Add support for Netgear WNR1000 V3
- firmware: Support small NVRAM partitions
- Use __initdata for LEDs platform data
Ingenic:
- Watchdog driver & platform code improvements:
- Disable clock after stopping counter
- Use devm_* functions
- Drop module remove function
- Move platform reset code to restart handler in driver
- JZ4740: Convert watchdog instantiation to DT
- JZ4780: Fix watchdog DT node
- qi_lb60_defconfig: Enable watchdog driver
Microsemi:
- Ocelot: Add support for integrated switch
- pcb123: Connect phys to ports"
* tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
MAINTAINERS: Add Paul Burton as MIPS co-maintainer
MIPS: ptrace: Make FPU context layout comments match reality
MIPS: memset.S: Reinstate delay slot indentation
MIPS: perf: Fix perf with MT counting other threads
MIPS: perf: Use correct VPE ID when setting up VPE tracing
MIPS: perf: More robustly probe for the presence of per-tc counters
MIPS: Probe for MIPS MT perf counters per TC
MIPS: mscc: Connect phys to ports on ocelot_pcb123
MIPS: mscc: Add switch to ocelot
MIPS: JZ4740: Drop old platform reset code
MIPS: qi_lb60: Enable the jz4740-wdt driver
MIPS: JZ4780: dts: Fix watchdog node
MIPS: JZ4740: dts: Add bindings for the jz4740-wdt driver
watchdog: JZ4740: Drop module remove function
watchdog: JZ4740: Register a restart handler
watchdog: JZ4740: Use devm_* functions
watchdog: JZ4740: Disable clock after stopping counter
MIPS: VPE: Fix spelling mistake: "uneeded" -> "unneeded"
MIPS: Re-use kstrtobool_from_user()
MIPS: Convert update_persistent_clock() to update_persistent_clock64()
...
This commit is contained in:
Linus Torvalds
commit
763f96944c
@ -3,10 +3,15 @@ Ingenic Watchdog Timer (WDT) Controller for JZ4740 & JZ4780
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Required properties:
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compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog"
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reg: Register address and length for watchdog registers
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clocks: phandle to the RTC clock
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clock-names: should be "rtc"
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Example:
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watchdog: jz4740-watchdog@10002000 {
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compatible = "ingenic,jz4740-watchdog";
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reg = <0x10002000 0x100>;
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reg = <0x10002000 0x10>;
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clocks = <&cgu JZ4740_CLK_RTC>;
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clock-names = "rtc";
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};
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@ -9417,10 +9417,12 @@ F: drivers/usb/image/microtek.*
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MIPS
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M: Ralf Baechle <ralf@linux-mips.org>
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M: Paul Burton <paul.burton@mips.com>
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M: James Hogan <jhogan@kernel.org>
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L: linux-mips@linux-mips.org
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W: http://www.linux-mips.org/
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T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git
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Q: http://patchwork.linux-mips.org/project/linux-mips/list/
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S: Supported
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F: Documentation/devicetree/bindings/mips/
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@ -22,6 +22,11 @@ config MIPS
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select GENERIC_CPU_AUTOPROBE
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_LIB_ASHLDI3
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select GENERIC_LIB_ASHRDI3
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select GENERIC_LIB_CMPDI2
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select GENERIC_LIB_LSHRDI3
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select GENERIC_LIB_UCMPDI2
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
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select GENERIC_SMP_IDLE_THREAD
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@ -172,6 +172,8 @@ struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = {
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{{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T00_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T50_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR"},
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{{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR"},
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@ -411,6 +411,12 @@ bcm47xx_buttons_netgear_wndr4500v1[] __initconst = {
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BCM47XX_GPIO_KEY(6, KEY_RESTART),
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};
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static const struct gpio_keys_button
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bcm47xx_buttons_netgear_wnr1000_v3[] __initconst = {
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BCM47XX_GPIO_KEY(2, KEY_WPS_BUTTON),
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BCM47XX_GPIO_KEY(3, KEY_RESTART),
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};
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static const struct gpio_keys_button
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bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = {
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BCM47XX_GPIO_KEY(4, KEY_RESTART),
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@ -670,6 +676,9 @@ int __init bcm47xx_buttons_register(void)
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case BCM47XX_BOARD_NETGEAR_WNDR4500V1:
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err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1);
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break;
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case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
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err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr1000_v3);
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break;
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case BCM47XX_BOARD_NETGEAR_WNR3500L:
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err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1);
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break;
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@ -497,6 +497,12 @@ bcm47xx_leds_netgear_wndr4500v1[] __initconst = {
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BCM47XX_GPIO_LED(14, "green", "usb2", 1, LEDS_GPIO_DEFSTATE_OFF),
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};
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static const struct gpio_led
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bcm47xx_leds_netgear_wnr1000_v3[] __initconst = {
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BCM47XX_GPIO_LED(0, "blue", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF),
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BCM47XX_GPIO_LED(1, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF),
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};
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static const struct gpio_led
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bcm47xx_leds_netgear_wnr3500lv1[] __initconst = {
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BCM47XX_GPIO_LED(0, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
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@ -532,7 +538,7 @@ bcm47xx_leds_simpletech_simpleshare[] __initconst = {
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* Init
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**************************************************/
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static struct gpio_led_platform_data bcm47xx_leds_pdata;
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static struct gpio_led_platform_data bcm47xx_leds_pdata __initdata;
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#define bcm47xx_set_pdata(dev_leds) do { \
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bcm47xx_leds_pdata.leds = dev_leds; \
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@ -758,6 +764,9 @@ void __init bcm47xx_leds_register(void)
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case BCM47XX_BOARD_NETGEAR_WNDR4500V1:
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bcm47xx_set_pdata(bcm47xx_leds_netgear_wndr4500v1);
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break;
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case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
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bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr1000_v3);
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break;
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case BCM47XX_BOARD_NETGEAR_WNR3500L:
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bcm47xx_set_pdata(bcm47xx_leds_netgear_wnr3500lv1);
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break;
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@ -46,10 +46,13 @@ $(obj)/uart-ath79.c: $(srctree)/arch/mips/ath79/early_printk.c
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vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o $(obj)/bswapsi.o
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extra-y += ashldi3.c bswapsi.c
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$(obj)/ashldi3.o $(obj)/bswapsi.o: KBUILD_CFLAGS += -I$(srctree)/arch/mips/lib
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$(obj)/ashldi3.c $(obj)/bswapsi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c
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$(call cmd,shipped)
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extra-y += ashldi3.c
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$(obj)/ashldi3.c: $(obj)/%.c: $(srctree)/lib/%.c FORCE
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$(call if_changed,shipped)
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extra-y += bswapsi.c
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$(obj)/bswapsi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c FORCE
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$(call if_changed,shipped)
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targets := $(notdir $(vmlinuzobjs-y))
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@ -34,4 +34,4 @@ dtb-$(CONFIG_DT_NONE) += \
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bcm97425svmb.dtb \
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bcm97435svmb.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -3,4 +3,4 @@ dtb-$(CONFIG_JZ4740_QI_LB60) += qi_lb60.dtb
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dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb
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dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -45,6 +45,14 @@
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#clock-cells = <1>;
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};
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watchdog: watchdog@10002000 {
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compatible = "ingenic,jz4740-watchdog";
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reg = <0x10002000 0x10>;
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clocks = <&cgu JZ4740_CLK_RTC>;
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clock-names = "rtc";
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};
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rtc_dev: rtc@10003000 {
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compatible = "ingenic,jz4740-rtc";
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reg = <0x10003000 0x40>;
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@ -222,7 +222,10 @@
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watchdog: watchdog@10002000 {
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compatible = "ingenic,jz4780-watchdog";
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reg = <0x10002000 0x100>;
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reg = <0x10002000 0x10>;
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clocks = <&cgu JZ4780_CLK_RTCLK>;
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clock-names = "rtc";
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};
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nemc: nemc@13410000 {
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_DT_EASY50712) += easy50712.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,3 +1,3 @@
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dtb-$(CONFIG_LEGACY_BOARD_OCELOT) += ocelot_pcb123.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -91,6 +91,72 @@
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status = "disabled";
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};
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|
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switch@1010000 {
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compatible = "mscc,vsc7514-switch";
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reg = <0x1010000 0x10000>,
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<0x1030000 0x10000>,
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<0x1080000 0x100>,
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||||
<0x10d0000 0x10000>,
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||||
<0x11e0000 0x100>,
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||||
<0x11f0000 0x100>,
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<0x1200000 0x100>,
|
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<0x1210000 0x100>,
|
||||
<0x1220000 0x100>,
|
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<0x1230000 0x100>,
|
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<0x1240000 0x100>,
|
||||
<0x1250000 0x100>,
|
||||
<0x1260000 0x100>,
|
||||
<0x1270000 0x100>,
|
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<0x1280000 0x100>,
|
||||
<0x1800000 0x80000>,
|
||||
<0x1880000 0x10000>;
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reg-names = "sys", "rew", "qs", "hsio", "port0",
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"port1", "port2", "port3", "port4", "port5",
|
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"port6", "port7", "port8", "port9", "port10",
|
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"qsys", "ana";
|
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interrupts = <21 22>;
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interrupt-names = "xtr", "inj";
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|
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ethernet-ports {
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
||||
|
||||
port0: port@0 {
|
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reg = <0>;
|
||||
};
|
||||
port1: port@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
port2: port@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
port3: port@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
port4: port@4 {
|
||||
reg = <4>;
|
||||
};
|
||||
port5: port@5 {
|
||||
reg = <5>;
|
||||
};
|
||||
port6: port@6 {
|
||||
reg = <6>;
|
||||
};
|
||||
port7: port@7 {
|
||||
reg = <7>;
|
||||
};
|
||||
port8: port@8 {
|
||||
reg = <8>;
|
||||
};
|
||||
port9: port@9 {
|
||||
reg = <9>;
|
||||
};
|
||||
port10: port@10 {
|
||||
reg = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reset@1070008 {
|
||||
compatible = "mscc,ocelot-chip-reset";
|
||||
reg = <0x1070008 0x4>;
|
||||
@ -113,5 +179,27 @@
|
||||
function = "uart2";
|
||||
};
|
||||
};
|
||||
|
||||
mdio0: mdio@107009c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mscc,ocelot-miim";
|
||||
reg = <0x107009c 0x36>, <0x10700f0 0x8>;
|
||||
interrupts = <14>;
|
||||
status = "disabled";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
phy3: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -25,3 +25,23 @@
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&port0 {
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
&port1 {
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
&port2 {
|
||||
phy-handle = <&phy2>;
|
||||
};
|
||||
|
||||
&port3 {
|
||||
phy-handle = <&phy3>;
|
||||
};
|
||||
|
||||
@ -2,4 +2,4 @@
|
||||
dtb-$(CONFIG_MIPS_MALTA) += malta.dtb
|
||||
dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
@ -5,4 +5,4 @@ dtb-$(CONFIG_DT_XLP_FVP) += xlp_fvp.dtb
|
||||
dtb-$(CONFIG_DT_XLP_GVP) += xlp_gvp.dtb
|
||||
dtb-$(CONFIG_DT_XLP_RVP) += xlp_rvp.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
@ -4,4 +4,4 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb
|
||||
dtb-$(CONFIG_DTB_PIC32_NONE) += \
|
||||
pic32mzda_sk.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
@ -6,4 +6,4 @@ dtb-$(CONFIG_DTB_MT7620A_EVAL) += mt7620a_eval.dtb
|
||||
dtb-$(CONFIG_DTB_OMEGA2P) += omega2p.dtb
|
||||
dtb-$(CONFIG_DTB_VOCORE2) += vocore2.dtb
|
||||
|
||||
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
|
||||
|
||||
@ -72,6 +72,8 @@ CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_BATTERY_JZ4740=y
|
||||
CONFIG_CHARGER_GPIO=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_JZ4740_WDT=y
|
||||
CONFIG_MFD_JZ4740_ADC=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
||||
@ -19,7 +19,7 @@
|
||||
#include <asm/dec/ioasic.h>
|
||||
#include <asm/dec/machtype.h>
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
unsigned int year, mon, day, hour, min, sec, real_year;
|
||||
unsigned long flags;
|
||||
@ -54,19 +54,20 @@ void read_persistent_clock(struct timespec *ts)
|
||||
|
||||
year += real_year - 72 + 2000;
|
||||
|
||||
ts->tv_sec = mktime(year, mon, day, hour, min, sec);
|
||||
ts->tv_sec = mktime64(year, mon, day, hour, min, sec);
|
||||
ts->tv_nsec = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* In order to set the CMOS clock precisely, rtc_mips_set_mmss has to
|
||||
* In order to set the CMOS clock precisely, update_persistent_clock64 has to
|
||||
* be called 500 ms after the second nowtime has started, because when
|
||||
* nowtime is written into the registers of the CMOS clock, it will
|
||||
* jump to the next second precisely 500 ms later. Check the Dallas
|
||||
* DS1287 data sheet for details.
|
||||
*/
|
||||
int rtc_mips_set_mmss(unsigned long nowtime)
|
||||
int update_persistent_clock64(struct timespec64 now)
|
||||
{
|
||||
time64_t nowtime = now.tv_sec;
|
||||
int retval = 0;
|
||||
int real_seconds, real_minutes, cmos_minutes;
|
||||
unsigned char save_control, save_freq_select;
|
||||
@ -91,8 +92,7 @@ int rtc_mips_set_mmss(unsigned long nowtime)
|
||||
* messing with unknown time zones but requires your
|
||||
* RTC not to be off by more than 15 minutes
|
||||
*/
|
||||
real_seconds = nowtime % 60;
|
||||
real_minutes = nowtime / 60;
|
||||
real_minutes = div_s64_rem(nowtime, 60, &real_seconds);
|
||||
if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
|
||||
real_minutes += 30; /* correct for half hour time zone */
|
||||
real_minutes %= 60;
|
||||
|
||||
@ -535,6 +535,13 @@
|
||||
# define cpu_has_shared_ftlb_entries 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
# define cpu_has_mipsmt_pertccounters \
|
||||
(cpu_data[0].options & MIPS_CPU_MT_PER_TC_PERF_COUNTERS)
|
||||
#else
|
||||
# define cpu_has_mipsmt_pertccounters 0
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
|
||||
/*
|
||||
* Guest capabilities
|
||||
*/
|
||||
|
||||
@ -418,6 +418,8 @@ enum cpu_type_enum {
|
||||
MBIT_ULL(54) /* CPU shares FTLB RAM with another */
|
||||
#define MIPS_CPU_SHARED_FTLB_ENTRIES \
|
||||
MBIT_ULL(55) /* CPU shares FTLB entries with another */
|
||||
#define MIPS_CPU_MT_PER_TC_PERF_COUNTERS \
|
||||
MBIT_ULL(56) /* CPU has perf counters implemented per TC (MIPSMT ASE) */
|
||||
|
||||
/*
|
||||
* CPU ASE encodings
|
||||
|
||||
@ -110,6 +110,7 @@ enum bcm47xx_board {
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4000,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4500V1,
|
||||
BCM47XX_BOARD_NETGEAR_WNDR4500V2,
|
||||
BCM47XX_BOARD_NETGEAR_WNR1000_V3,
|
||||
BCM47XX_BOARD_NETGEAR_WNR2000,
|
||||
BCM47XX_BOARD_NETGEAR_WNR3500L,
|
||||
BCM47XX_BOARD_NETGEAR_WNR3500U,
|
||||
|
||||
@ -29,7 +29,6 @@ extern struct platform_device jz4740_i2s_device;
|
||||
extern struct platform_device jz4740_pcm_device;
|
||||
extern struct platform_device jz4740_codec_device;
|
||||
extern struct platform_device jz4740_adc_device;
|
||||
extern struct platform_device jz4740_wdt_device;
|
||||
extern struct platform_device jz4740_pwm_device;
|
||||
extern struct platform_device jz4740_dma_device;
|
||||
|
||||
|
||||
@ -86,7 +86,7 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime)
|
||||
return retval;
|
||||
}
|
||||
|
||||
static inline unsigned long mc146818_get_cmos_time(void)
|
||||
static inline time64_t mc146818_get_cmos_time(void)
|
||||
{
|
||||
unsigned int year, mon, day, hour, min, sec;
|
||||
unsigned long flags;
|
||||
@ -113,7 +113,7 @@ static inline unsigned long mc146818_get_cmos_time(void)
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
year = mc146818_decode_year(year);
|
||||
|
||||
return mktime(year, mon, day, hour, min, sec);
|
||||
return mktime64(year, mon, day, hour, min, sec);
|
||||
}
|
||||
|
||||
#endif /* __ASM_MC146818_TIME_H */
|
||||
|
||||
@ -685,6 +685,11 @@
|
||||
#define MIPS_CONF7_IAR (_ULCAST_(1) << 10)
|
||||
#define MIPS_CONF7_AR (_ULCAST_(1) << 16)
|
||||
|
||||
/* Config7 Bits specific to MIPS Technologies. */
|
||||
|
||||
/* Performance counters implemented Per TC */
|
||||
#define MTI_CONF7_PTC (_ULCAST_(1) << 19)
|
||||
|
||||
/* WatchLo* register definitions */
|
||||
#define MIPS_WATCHLO_IRW (_ULCAST_(0x7) << 0)
|
||||
|
||||
|
||||
@ -21,15 +21,6 @@
|
||||
|
||||
extern spinlock_t rtc_lock;
|
||||
|
||||
/*
|
||||
* RTC ops. By default, they point to weak no-op RTC functions.
|
||||
* rtc_mips_set_time - reverse the above translation and set time to RTC.
|
||||
* rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
|
||||
* to be set. Used by RTC sync-up.
|
||||
*/
|
||||
extern int rtc_mips_set_time(unsigned long);
|
||||
extern int rtc_mips_set_mmss(unsigned long);
|
||||
|
||||
/*
|
||||
* board specific routines required by time_init().
|
||||
*/
|
||||
|
||||
@ -233,22 +233,6 @@ struct platform_device jz4740_adc_device = {
|
||||
.resource = jz4740_adc_resources,
|
||||
};
|
||||
|
||||
/* Watchdog */
|
||||
static struct resource jz4740_wdt_resources[] = {
|
||||
{
|
||||
.start = JZ4740_WDT_BASE_ADDR,
|
||||
.end = JZ4740_WDT_BASE_ADDR + 0x10 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device jz4740_wdt_device = {
|
||||
.name = "jz4740-wdt",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(jz4740_wdt_resources),
|
||||
.resource = jz4740_wdt_resources,
|
||||
};
|
||||
|
||||
/* PWM */
|
||||
struct platform_device jz4740_pwm_device = {
|
||||
.name = "jz4740-pwm",
|
||||
|
||||
@ -12,18 +12,9 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/reboot.h>
|
||||
|
||||
#include <asm/mach-jz4740/base.h>
|
||||
#include <asm/mach-jz4740/timer.h>
|
||||
|
||||
#include "reset.h"
|
||||
#include "clock.h"
|
||||
|
||||
static void jz4740_halt(void)
|
||||
{
|
||||
@ -36,29 +27,7 @@ static void jz4740_halt(void)
|
||||
}
|
||||
}
|
||||
|
||||
#define JZ_REG_WDT_DATA 0x00
|
||||
#define JZ_REG_WDT_COUNTER_ENABLE 0x04
|
||||
#define JZ_REG_WDT_COUNTER 0x08
|
||||
#define JZ_REG_WDT_CTRL 0x0c
|
||||
|
||||
static void jz4740_restart(char *command)
|
||||
{
|
||||
void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f);
|
||||
|
||||
jz4740_timer_enable_watchdog();
|
||||
|
||||
writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
|
||||
|
||||
writew(0, wdt_base + JZ_REG_WDT_COUNTER);
|
||||
writew(0, wdt_base + JZ_REG_WDT_DATA);
|
||||
writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL);
|
||||
|
||||
writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);
|
||||
jz4740_halt();
|
||||
}
|
||||
|
||||
void jz4740_reset_init(void)
|
||||
{
|
||||
_machine_restart = jz4740_restart;
|
||||
_machine_halt = jz4740_halt;
|
||||
}
|
||||
|
||||
@ -414,6 +414,14 @@ static int __init ftlb_disable(char *s)
|
||||
|
||||
__setup("noftlb", ftlb_disable);
|
||||
|
||||
/*
|
||||
* Check if the CPU has per tc perf counters
|
||||
*/
|
||||
static inline void cpu_set_mt_per_tc_perf(struct cpuinfo_mips *c)
|
||||
{
|
||||
if (read_c0_config7() & MTI_CONF7_PTC)
|
||||
c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS;
|
||||
}
|
||||
|
||||
static inline void check_errata(void)
|
||||
{
|
||||
@ -1572,6 +1580,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
c->cputype = CPU_34K;
|
||||
c->writecombine = _CACHE_UNCACHED;
|
||||
__cpu_name[cpu] = "MIPS 34Kc";
|
||||
cpu_set_mt_per_tc_perf(c);
|
||||
break;
|
||||
case PRID_IMP_74K:
|
||||
c->cputype = CPU_74K;
|
||||
@ -1592,6 +1601,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
c->cputype = CPU_1004K;
|
||||
c->writecombine = _CACHE_UNCACHED;
|
||||
__cpu_name[cpu] = "MIPS 1004Kc";
|
||||
cpu_set_mt_per_tc_perf(c);
|
||||
break;
|
||||
case PRID_IMP_1074K:
|
||||
c->cputype = CPU_1074K;
|
||||
@ -1601,10 +1611,12 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
case PRID_IMP_INTERAPTIV_UP:
|
||||
c->cputype = CPU_INTERAPTIV;
|
||||
__cpu_name[cpu] = "MIPS interAptiv";
|
||||
cpu_set_mt_per_tc_perf(c);
|
||||
break;
|
||||
case PRID_IMP_INTERAPTIV_MP:
|
||||
c->cputype = CPU_INTERAPTIV;
|
||||
__cpu_name[cpu] = "MIPS interAptiv (multi)";
|
||||
cpu_set_mt_per_tc_perf(c);
|
||||
break;
|
||||
case PRID_IMP_PROAPTIV_UP:
|
||||
c->cputype = CPU_PROAPTIV;
|
||||
|
||||
@ -129,20 +129,14 @@ static struct mips_pmu mipspmu;
|
||||
|
||||
|
||||
#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
|
||||
static int cpu_has_mipsmt_pertccounters;
|
||||
|
||||
static DEFINE_RWLOCK(pmuint_rwlock);
|
||||
|
||||
#if defined(CONFIG_CPU_BMIPS5000)
|
||||
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
|
||||
0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK))
|
||||
#else
|
||||
/*
|
||||
* FIXME: For VSMP, vpe_id() is redefined for Perf-events, because
|
||||
* cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs.
|
||||
*/
|
||||
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
|
||||
0 : smp_processor_id())
|
||||
0 : cpu_vpe_id(¤t_cpu_data))
|
||||
#endif
|
||||
|
||||
/* Copied from op_model_mipsxx.c */
|
||||
@ -329,7 +323,11 @@ static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc,
|
||||
|
||||
static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
|
||||
{
|
||||
struct perf_event *event = container_of(evt, struct perf_event, hw);
|
||||
struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
unsigned int range = evt->event_base >> 24;
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
|
||||
WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
|
||||
|
||||
@ -337,11 +335,37 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
|
||||
(evt->config_base & M_PERFCTL_CONFIG_MASK) |
|
||||
/* Make sure interrupt enabled. */
|
||||
MIPS_PERFCTRL_IE;
|
||||
if (IS_ENABLED(CONFIG_CPU_BMIPS5000))
|
||||
|
||||
#ifdef CONFIG_CPU_BMIPS5000
|
||||
{
|
||||
/* enable the counter for the calling thread */
|
||||
cpuc->saved_ctrl[idx] |=
|
||||
(1 << (12 + vpe_id())) | BRCM_PERFCTRL_TC;
|
||||
}
|
||||
#else
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
if (range > V) {
|
||||
/* The counter is processor wide. Set it up to count all TCs. */
|
||||
pr_debug("Enabling perf counter for all TCs\n");
|
||||
cpuc->saved_ctrl[idx] |= M_TC_EN_ALL;
|
||||
} else
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
{
|
||||
unsigned int cpu, ctrl;
|
||||
|
||||
/*
|
||||
* Set up the counter for a particular CPU when event->cpu is
|
||||
* a valid CPU number. Otherwise set up the counter for the CPU
|
||||
* scheduling this thread.
|
||||
*/
|
||||
cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();
|
||||
|
||||
ctrl = M_PERFCTL_VPEID(cpu_vpe_id(&cpu_data[cpu]));
|
||||
ctrl |= M_TC_EN_VPE;
|
||||
cpuc->saved_ctrl[idx] |= ctrl;
|
||||
pr_debug("Enabling perf counter for CPU%d\n", cpu);
|
||||
}
|
||||
#endif /* CONFIG_CPU_BMIPS5000 */
|
||||
/*
|
||||
* We do not actually let the counter run. Leave it until start().
|
||||
*/
|
||||
@ -655,13 +679,14 @@ static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev)
|
||||
* event_id.
|
||||
*/
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
return ((unsigned int)pev->range << 24) |
|
||||
(pev->cntr_mask & 0xffff00) |
|
||||
(pev->event_id & 0xff);
|
||||
#else
|
||||
return (pev->cntr_mask & 0xffff00) |
|
||||
(pev->event_id & 0xff);
|
||||
#endif
|
||||
if (num_possible_cpus() > 1)
|
||||
return ((unsigned int)pev->range << 24) |
|
||||
(pev->cntr_mask & 0xffff00) |
|
||||
(pev->event_id & 0xff);
|
||||
else
|
||||
#endif /* CONFIG_MIPS_MT_SMP */
|
||||
return ((pev->cntr_mask & 0xffff00) |
|
||||
(pev->event_id & 0xff));
|
||||
}
|
||||
|
||||
static const struct mips_perf_event *mipspmu_map_general_event(int idx)
|
||||
@ -1265,37 +1290,6 @@ static const struct mips_perf_event xlp_cache_map
|
||||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
static void check_and_calc_range(struct perf_event *event,
|
||||
const struct mips_perf_event *pev)
|
||||
{
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
|
||||
if (event->cpu >= 0) {
|
||||
if (pev->range > V) {
|
||||
/*
|
||||
* The user selected an event that is processor
|
||||
* wide, while expecting it to be VPE wide.
|
||||
*/
|
||||
hwc->config_base |= M_TC_EN_ALL;
|
||||
} else {
|
||||
/*
|
||||
* FIXME: cpu_data[event->cpu].vpe_id reports 0
|
||||
* for both CPUs.
|
||||
*/
|
||||
hwc->config_base |= M_PERFCTL_VPEID(event->cpu);
|
||||
hwc->config_base |= M_TC_EN_VPE;
|
||||
}
|
||||
} else
|
||||
hwc->config_base |= M_TC_EN_ALL;
|
||||
}
|
||||
#else
|
||||
static void check_and_calc_range(struct perf_event *event,
|
||||
const struct mips_perf_event *pev)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static int __hw_perf_event_init(struct perf_event *event)
|
||||
{
|
||||
struct perf_event_attr *attr = &event->attr;
|
||||
@ -1331,10 +1325,6 @@ static int __hw_perf_event_init(struct perf_event *event)
|
||||
*/
|
||||
hwc->config_base = MIPS_PERFCTRL_IE;
|
||||
|
||||
/* Calculate range bits and validate it. */
|
||||
if (num_possible_cpus() > 1)
|
||||
check_and_calc_range(event, pev);
|
||||
|
||||
hwc->event_base = mipspmu_perf_event_encode(pev);
|
||||
if (PERF_TYPE_RAW == event->attr.type)
|
||||
mutex_unlock(&raw_event_mutex);
|
||||
@ -1723,7 +1713,6 @@ init_hw_perf_events(void)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
|
||||
cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
|
||||
if (!cpu_has_mipsmt_pertccounters)
|
||||
counters = counters_total_to_per_cpu(counters);
|
||||
#endif
|
||||
|
||||
@ -811,7 +811,7 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
* registers - unless we're using r2k_switch.S.
|
||||
* registers.
|
||||
*/
|
||||
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
||||
addr & 1);
|
||||
@ -906,7 +906,7 @@ long arch_ptrace(struct task_struct *child, long request,
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
* registers - unless we're using r2k_switch.S.
|
||||
* registers.
|
||||
*/
|
||||
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
||||
addr & 1, data);
|
||||
|
||||
@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
* registers - unless we're using r2k_switch.S.
|
||||
* registers.
|
||||
*/
|
||||
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
||||
addr & 1);
|
||||
@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
/*
|
||||
* The odd registers are actually the high
|
||||
* order bits of the values stored in the even
|
||||
* registers - unless we're using r2k_switch.S.
|
||||
* registers.
|
||||
*/
|
||||
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
||||
addr & 1, data);
|
||||
|
||||
@ -34,21 +34,6 @@
|
||||
DEFINE_SPINLOCK(rtc_lock);
|
||||
EXPORT_SYMBOL(rtc_lock);
|
||||
|
||||
int __weak rtc_mips_set_time(unsigned long sec)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
int __weak rtc_mips_set_mmss(unsigned long nowtime)
|
||||
{
|
||||
return rtc_mips_set_time(nowtime);
|
||||
}
|
||||
|
||||
int update_persistent_clock(struct timespec now)
|
||||
{
|
||||
return rtc_mips_set_mmss(now.tv_sec);
|
||||
}
|
||||
|
||||
static int null_perf_irq(void)
|
||||
{
|
||||
return 0;
|
||||
|
||||
@ -872,7 +872,7 @@ static ssize_t vpe_write(struct file *file, const char __user *buffer,
|
||||
return -ENODEV;
|
||||
|
||||
if ((count + v->len) > v->plen) {
|
||||
pr_warn("VPE loader: elf size too big. Perhaps strip uneeded symbols\n");
|
||||
pr_warn("VPE loader: elf size too big. Perhaps strip unneeded symbols\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
|
||||
@ -136,7 +136,7 @@ static void rtc_end_op(void)
|
||||
lasat_ndelay(1000);
|
||||
}
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
unsigned long word;
|
||||
unsigned long flags;
|
||||
@ -152,14 +152,19 @@ void read_persistent_clock(struct timespec *ts)
|
||||
ts->tv_nsec = 0;
|
||||
}
|
||||
|
||||
int rtc_mips_set_mmss(unsigned long time)
|
||||
int update_persistent_clock64(struct timespec64 now)
|
||||
{
|
||||
time64_t time = now.tv_sec;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
rtc_init_op();
|
||||
rtc_write_byte(SET_TIME_CMD);
|
||||
rtc_write_word(time);
|
||||
/*
|
||||
* Due to the hardware limitation, we cast to 'unsigned long' type,
|
||||
* so it will overflow in year 2106 on 32-bit machine.
|
||||
*/
|
||||
rtc_write_word((unsigned long)time);
|
||||
rtc_end_op();
|
||||
spin_unlock_irqrestore(&rtc_lock, flags);
|
||||
|
||||
|
||||
@ -73,8 +73,16 @@ int proc_dolasatrtc(struct ctl_table *table, int write,
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
if (write)
|
||||
rtc_mips_set_mmss(rtctmp);
|
||||
if (write) {
|
||||
/*
|
||||
* Due to the RTC hardware limitation, we can not actually
|
||||
* use the full 64-bit range here.
|
||||
*/
|
||||
ts.tv_sec = rtctmp;
|
||||
ts.tv_nsec = 0;
|
||||
|
||||
update_persistent_clock64(ts);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -16,5 +16,4 @@ obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
|
||||
obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o
|
||||
|
||||
# libgcc-style stuff needed in the kernel
|
||||
obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o multi3.o \
|
||||
ucmpdi2.o
|
||||
obj-y += bswapsi.o bswapdi.o multi3.o
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "libgcc.h"
|
||||
|
||||
long long notrace __ashldi3(long long u, word_type b)
|
||||
{
|
||||
DWunion uu, w;
|
||||
word_type bm;
|
||||
|
||||
if (b == 0)
|
||||
return u;
|
||||
|
||||
uu.ll = u;
|
||||
bm = 32 - b;
|
||||
|
||||
if (bm <= 0) {
|
||||
w.s.low = 0;
|
||||
w.s.high = (unsigned int) uu.s.low << -bm;
|
||||
} else {
|
||||
const unsigned int carries = (unsigned int) uu.s.low >> bm;
|
||||
|
||||
w.s.low = (unsigned int) uu.s.low << b;
|
||||
w.s.high = ((unsigned int) uu.s.high << b) | carries;
|
||||
}
|
||||
|
||||
return w.ll;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__ashldi3);
|
||||
@ -1,32 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "libgcc.h"
|
||||
|
||||
long long notrace __ashrdi3(long long u, word_type b)
|
||||
{
|
||||
DWunion uu, w;
|
||||
word_type bm;
|
||||
|
||||
if (b == 0)
|
||||
return u;
|
||||
|
||||
uu.ll = u;
|
||||
bm = 32 - b;
|
||||
|
||||
if (bm <= 0) {
|
||||
/* w.s.high = 1..1 or 0..0 */
|
||||
w.s.high =
|
||||
uu.s.high >> 31;
|
||||
w.s.low = uu.s.high >> -bm;
|
||||
} else {
|
||||
const unsigned int carries = (unsigned int) uu.s.high << bm;
|
||||
|
||||
w.s.high = uu.s.high >> b;
|
||||
w.s.low = ((unsigned int) uu.s.low >> b) | carries;
|
||||
}
|
||||
|
||||
return w.ll;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__ashrdi3);
|
||||
@ -1,28 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "libgcc.h"
|
||||
|
||||
word_type notrace __cmpdi2(long long a, long long b)
|
||||
{
|
||||
const DWunion au = {
|
||||
.ll = a
|
||||
};
|
||||
const DWunion bu = {
|
||||
.ll = b
|
||||
};
|
||||
|
||||
if (au.s.high < bu.s.high)
|
||||
return 0;
|
||||
else if (au.s.high > bu.s.high)
|
||||
return 2;
|
||||
|
||||
if ((unsigned int) au.s.low < (unsigned int) bu.s.low)
|
||||
return 0;
|
||||
else if ((unsigned int) au.s.low > (unsigned int) bu.s.low)
|
||||
return 2;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__cmpdi2);
|
||||
@ -1,30 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "libgcc.h"
|
||||
|
||||
long long notrace __lshrdi3(long long u, word_type b)
|
||||
{
|
||||
DWunion uu, w;
|
||||
word_type bm;
|
||||
|
||||
if (b == 0)
|
||||
return u;
|
||||
|
||||
uu.ll = u;
|
||||
bm = 32 - b;
|
||||
|
||||
if (bm <= 0) {
|
||||
w.s.high = 0;
|
||||
w.s.low = (unsigned int) uu.s.high >> -bm;
|
||||
} else {
|
||||
const unsigned int carries = (unsigned int) uu.s.high << bm;
|
||||
|
||||
w.s.high = (unsigned int) uu.s.high >> b;
|
||||
w.s.low = ((unsigned int) uu.s.low >> b) | carries;
|
||||
}
|
||||
|
||||
return w.ll;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__lshrdi3);
|
||||
@ -95,7 +95,7 @@
|
||||
|
||||
sltiu t0, a2, STORSIZE /* very small region? */
|
||||
bnez t0, .Lsmall_memset\@
|
||||
andi t0, a0, STORMASK /* aligned? */
|
||||
andi t0, a0, STORMASK /* aligned? */
|
||||
|
||||
#ifdef CONFIG_CPU_MICROMIPS
|
||||
move t8, a1 /* used by 'swp' instruction */
|
||||
@ -103,12 +103,12 @@
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
|
||||
beqz t0, 1f
|
||||
PTR_SUBU t0, STORSIZE /* alignment in bytes */
|
||||
PTR_SUBU t0, STORSIZE /* alignment in bytes */
|
||||
#else
|
||||
.set noat
|
||||
li AT, STORSIZE
|
||||
beqz t0, 1f
|
||||
PTR_SUBU t0, AT /* alignment in bytes */
|
||||
PTR_SUBU t0, AT /* alignment in bytes */
|
||||
.set at
|
||||
#endif
|
||||
|
||||
@ -149,7 +149,7 @@
|
||||
1: ori t1, a2, 0x3f /* # of full blocks */
|
||||
xori t1, 0x3f
|
||||
beqz t1, .Lmemset_partial\@ /* no block to fill */
|
||||
andi t0, a2, 0x40-STORSIZE
|
||||
andi t0, a2, 0x40-STORSIZE
|
||||
|
||||
PTR_ADDU t1, a0 /* end address */
|
||||
.set reorder
|
||||
@ -174,7 +174,7 @@
|
||||
.set at
|
||||
#endif
|
||||
jr t1
|
||||
PTR_ADDU a0, t0 /* dest ptr */
|
||||
PTR_ADDU a0, t0 /* dest ptr */
|
||||
|
||||
.set push
|
||||
.set noreorder
|
||||
@ -186,7 +186,7 @@
|
||||
|
||||
beqz a2, 1f
|
||||
#ifndef CONFIG_CPU_MIPSR6
|
||||
PTR_ADDU a0, a2 /* What's left */
|
||||
PTR_ADDU a0, a2 /* What's left */
|
||||
R10KCBARRIER(0(ra))
|
||||
#ifdef __MIPSEB__
|
||||
EX(LONG_S_R, a1, -1(a0), .Llast_fixup\@)
|
||||
@ -194,7 +194,7 @@
|
||||
EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@)
|
||||
#endif
|
||||
#else
|
||||
PTR_SUBU t0, $0, a2
|
||||
PTR_SUBU t0, $0, a2
|
||||
PTR_ADDIU t0, 1
|
||||
STORE_BYTE(0)
|
||||
STORE_BYTE(1)
|
||||
@ -210,11 +210,11 @@
|
||||
0:
|
||||
#endif
|
||||
1: jr ra
|
||||
move a2, zero
|
||||
move a2, zero
|
||||
|
||||
.Lsmall_memset\@:
|
||||
beqz a2, 2f
|
||||
PTR_ADDU t1, a0, a2
|
||||
PTR_ADDU t1, a0, a2
|
||||
|
||||
1: PTR_ADDIU a0, 1 /* fill bytewise */
|
||||
R10KCBARRIER(0(ra))
|
||||
@ -222,7 +222,7 @@
|
||||
EX(sb, a1, -1(a0), .Lsmall_fixup\@)
|
||||
|
||||
2: jr ra /* done */
|
||||
move a2, zero
|
||||
move a2, zero
|
||||
.if __memset == 1
|
||||
END(memset)
|
||||
.set __memset, 0
|
||||
@ -238,7 +238,7 @@
|
||||
|
||||
.Lfirst_fixup\@:
|
||||
jr ra
|
||||
nop
|
||||
nop
|
||||
|
||||
.Lfwd_fixup\@:
|
||||
PTR_L t0, TI_TASK($28)
|
||||
@ -246,7 +246,7 @@
|
||||
LONG_L t0, THREAD_BUADDR(t0)
|
||||
LONG_ADDU a2, t1
|
||||
jr ra
|
||||
LONG_SUBU a2, t0
|
||||
LONG_SUBU a2, t0
|
||||
|
||||
.Lpartial_fixup\@:
|
||||
PTR_L t0, TI_TASK($28)
|
||||
@ -254,7 +254,7 @@
|
||||
LONG_L t0, THREAD_BUADDR(t0)
|
||||
LONG_ADDU a2, a0
|
||||
jr ra
|
||||
LONG_SUBU a2, t0
|
||||
LONG_SUBU a2, t0
|
||||
|
||||
.Llast_fixup\@:
|
||||
jr ra
|
||||
@ -278,7 +278,7 @@
|
||||
LEAF(memset)
|
||||
EXPORT_SYMBOL(memset)
|
||||
beqz a1, 1f
|
||||
move v0, a0 /* result */
|
||||
move v0, a0 /* result */
|
||||
|
||||
andi a1, 0xff /* spread fillword */
|
||||
LONG_SLL t1, a1, 8
|
||||
|
||||
@ -1,22 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/export.h>
|
||||
|
||||
#include "libgcc.h"
|
||||
|
||||
word_type notrace __ucmpdi2(unsigned long long a, unsigned long long b)
|
||||
{
|
||||
const DWunion au = {.ll = a};
|
||||
const DWunion bu = {.ll = b};
|
||||
|
||||
if ((unsigned int) au.s.high < (unsigned int) bu.s.high)
|
||||
return 0;
|
||||
else if ((unsigned int) au.s.high > (unsigned int) bu.s.high)
|
||||
return 2;
|
||||
if ((unsigned int) au.s.low < (unsigned int) bu.s.low)
|
||||
return 0;
|
||||
else if ((unsigned int) au.s.low > (unsigned int) bu.s.low)
|
||||
return 2;
|
||||
return 1;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__ucmpdi2);
|
||||
@ -29,7 +29,7 @@ void __init plat_time_init(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
ts->tv_sec = mc146818_get_cmos_time();
|
||||
ts->tv_nsec = 0;
|
||||
|
||||
@ -31,17 +31,10 @@ static ssize_t sc_prefetch_write(struct file *file,
|
||||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
char buf[32];
|
||||
ssize_t buf_size;
|
||||
bool enabled;
|
||||
int err;
|
||||
|
||||
buf_size = min(count, sizeof(buf) - 1);
|
||||
if (copy_from_user(buf, user_buf, buf_size))
|
||||
return -EFAULT;
|
||||
|
||||
buf[buf_size] = '\0';
|
||||
err = strtobool(buf, &enabled);
|
||||
err = kstrtobool_from_user(user_buf, count, &enabled);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
|
||||
@ -134,7 +134,7 @@ static void __init estimate_frequencies(void)
|
||||
}
|
||||
}
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
ts->tv_sec = mc146818_get_cmos_time();
|
||||
ts->tv_nsec = 0;
|
||||
|
||||
@ -36,7 +36,6 @@ static int perfcount_irq;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
static int cpu_has_mipsmt_pertccounters;
|
||||
#define WHAT (MIPS_PERFCTRL_MT_EN_VPE | \
|
||||
M_PERFCTL_VPEID(cpu_vpe_id(¤t_cpu_data)))
|
||||
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
|
||||
@ -326,7 +325,6 @@ static int __init mipsxx_init(void)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
|
||||
if (!cpu_has_mipsmt_pertccounters)
|
||||
counters = counters_total_to_per_cpu(counters);
|
||||
#endif
|
||||
|
||||
@ -141,13 +141,13 @@ static int m41t81_write(uint8_t addr, int b)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int m41t81_set_time(unsigned long t)
|
||||
int m41t81_set_time(time64_t t)
|
||||
{
|
||||
struct rtc_time tm;
|
||||
unsigned long flags;
|
||||
|
||||
/* Note we don't care about the century */
|
||||
rtc_time_to_tm(t, &tm);
|
||||
rtc_time64_to_tm(t, &tm);
|
||||
|
||||
/*
|
||||
* Note the write order matters as it ensures the correctness.
|
||||
@ -188,7 +188,7 @@ int m41t81_set_time(unsigned long t)
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long m41t81_get_time(void)
|
||||
time64_t m41t81_get_time(void)
|
||||
{
|
||||
unsigned int year, mon, day, hour, min, sec;
|
||||
unsigned long flags;
|
||||
@ -218,7 +218,7 @@ unsigned long m41t81_get_time(void)
|
||||
|
||||
year += 2000;
|
||||
|
||||
return mktime(year, mon, day, hour, min, sec);
|
||||
return mktime64(year, mon, day, hour, min, sec);
|
||||
}
|
||||
|
||||
int m41t81_probe(void)
|
||||
|
||||
@ -109,13 +109,13 @@ static int xicor_write(uint8_t addr, int b)
|
||||
}
|
||||
}
|
||||
|
||||
int xicor_set_time(unsigned long t)
|
||||
int xicor_set_time(time64_t t)
|
||||
{
|
||||
struct rtc_time tm;
|
||||
int tmp;
|
||||
unsigned long flags;
|
||||
|
||||
rtc_time_to_tm(t, &tm);
|
||||
rtc_time64_to_tm(t, &tm);
|
||||
tm.tm_year += 1900;
|
||||
|
||||
spin_lock_irqsave(&rtc_lock, flags);
|
||||
@ -168,7 +168,7 @@ int xicor_set_time(unsigned long t)
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long xicor_get_time(void)
|
||||
time64_t xicor_get_time(void)
|
||||
{
|
||||
unsigned int year, mon, day, hour, min, sec, y2k;
|
||||
unsigned long flags;
|
||||
@ -201,7 +201,7 @@ unsigned long xicor_get_time(void)
|
||||
|
||||
year += (y2k * 100);
|
||||
|
||||
return mktime(year, mon, day, hour, min, sec);
|
||||
return mktime64(year, mon, day, hour, min, sec);
|
||||
}
|
||||
|
||||
int xicor_probe(void)
|
||||
|
||||
@ -57,12 +57,12 @@ extern void sb1250_setup(void);
|
||||
#endif
|
||||
|
||||
extern int xicor_probe(void);
|
||||
extern int xicor_set_time(unsigned long);
|
||||
extern unsigned long xicor_get_time(void);
|
||||
extern int xicor_set_time(time64_t);
|
||||
extern time64_t xicor_get_time(void);
|
||||
|
||||
extern int m41t81_probe(void);
|
||||
extern int m41t81_set_time(unsigned long);
|
||||
extern unsigned long m41t81_get_time(void);
|
||||
extern int m41t81_set_time(time64_t);
|
||||
extern time64_t m41t81_get_time(void);
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
@ -87,9 +87,9 @@ enum swarm_rtc_type {
|
||||
|
||||
enum swarm_rtc_type swarm_rtc_type;
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
void read_persistent_clock64(struct timespec64 *ts)
|
||||
{
|
||||
unsigned long sec;
|
||||
time64_t sec;
|
||||
|
||||
switch (swarm_rtc_type) {
|
||||
case RTC_XICOR:
|
||||
@ -102,15 +102,17 @@ void read_persistent_clock(struct timespec *ts)
|
||||
|
||||
case RTC_NONE:
|
||||
default:
|
||||
sec = mktime(2000, 1, 1, 0, 0, 0);
|
||||
sec = mktime64(2000, 1, 1, 0, 0, 0);
|
||||
break;
|
||||
}
|
||||
ts->tv_sec = sec;
|
||||
ts->tv_nsec = 0;
|
||||
}
|
||||
|
||||
int rtc_mips_set_time(unsigned long sec)
|
||||
int update_persistent_clock64(struct timespec64 now)
|
||||
{
|
||||
time64_t sec = now.tv_sec;
|
||||
|
||||
switch (swarm_rtc_type) {
|
||||
case RTC_XICOR:
|
||||
return xicor_set_time(sec);
|
||||
|
||||
@ -171,9 +171,3 @@ void __init plat_time_init(void)
|
||||
}
|
||||
setup_pit_timer();
|
||||
}
|
||||
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
ts->tv_sec = -1;
|
||||
ts->tv_nsec = 0;
|
||||
}
|
||||
|
||||
@ -103,9 +103,9 @@ choice
|
||||
config ARCH_RV32I
|
||||
bool "RV32I"
|
||||
select 32BIT
|
||||
select GENERIC_ASHLDI3
|
||||
select GENERIC_ASHRDI3
|
||||
select GENERIC_LSHRDI3
|
||||
select GENERIC_LIB_ASHLDI3
|
||||
select GENERIC_LIB_ASHRDI3
|
||||
select GENERIC_LIB_LSHRDI3
|
||||
|
||||
config ARCH_RV64I
|
||||
bool "RV64I"
|
||||
|
||||
@ -36,7 +36,7 @@ struct nvram_header {
|
||||
|
||||
static char nvram_buf[NVRAM_SPACE];
|
||||
static size_t nvram_len;
|
||||
static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
|
||||
static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
|
||||
|
||||
static u32 find_nvram_size(void __iomem *end)
|
||||
{
|
||||
|
||||
@ -124,12 +124,20 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
|
||||
|
||||
jz4740_timer_disable_watchdog();
|
||||
writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE);
|
||||
jz4740_timer_disable_watchdog();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int jz4740_wdt_restart(struct watchdog_device *wdt_dev,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
wdt_dev->timeout = 0;
|
||||
jz4740_wdt_start(wdt_dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct watchdog_info jz4740_wdt_info = {
|
||||
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
|
||||
.identity = "jz4740 Watchdog",
|
||||
@ -141,6 +149,7 @@ static const struct watchdog_ops jz4740_wdt_ops = {
|
||||
.stop = jz4740_wdt_stop,
|
||||
.ping = jz4740_wdt_ping,
|
||||
.set_timeout = jz4740_wdt_set_timeout,
|
||||
.restart = jz4740_wdt_restart,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
@ -179,45 +188,26 @@ static int jz4740_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
drvdata->base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(drvdata->base)) {
|
||||
ret = PTR_ERR(drvdata->base);
|
||||
goto err_out;
|
||||
}
|
||||
if (IS_ERR(drvdata->base))
|
||||
return PTR_ERR(drvdata->base);
|
||||
|
||||
drvdata->rtc_clk = clk_get(&pdev->dev, "rtc");
|
||||
drvdata->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
|
||||
if (IS_ERR(drvdata->rtc_clk)) {
|
||||
dev_err(&pdev->dev, "cannot find RTC clock\n");
|
||||
ret = PTR_ERR(drvdata->rtc_clk);
|
||||
goto err_out;
|
||||
return PTR_ERR(drvdata->rtc_clk);
|
||||
}
|
||||
|
||||
ret = watchdog_register_device(&drvdata->wdt);
|
||||
ret = devm_watchdog_register_device(&pdev->dev, &drvdata->wdt);
|
||||
if (ret < 0)
|
||||
goto err_disable_clk;
|
||||
return ret;
|
||||
|
||||
platform_set_drvdata(pdev, drvdata);
|
||||
return 0;
|
||||
|
||||
err_disable_clk:
|
||||
clk_put(drvdata->rtc_clk);
|
||||
err_out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int jz4740_wdt_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct jz4740_wdt_drvdata *drvdata = platform_get_drvdata(pdev);
|
||||
|
||||
jz4740_wdt_stop(&drvdata->wdt);
|
||||
watchdog_unregister_device(&drvdata->wdt);
|
||||
clk_put(drvdata->rtc_clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver jz4740_wdt_driver = {
|
||||
.probe = jz4740_wdt_probe,
|
||||
.remove = jz4740_wdt_remove,
|
||||
.driver = {
|
||||
.name = "jz4740-wdt",
|
||||
.of_match_table = of_match_ptr(jz4740_wdt_of_matches),
|
||||
|
||||
12
lib/Kconfig
12
lib/Kconfig
@ -642,20 +642,20 @@ config STRING_SELFTEST
|
||||
|
||||
endmenu
|
||||
|
||||
config GENERIC_ASHLDI3
|
||||
config GENERIC_LIB_ASHLDI3
|
||||
bool
|
||||
|
||||
config GENERIC_ASHRDI3
|
||||
config GENERIC_LIB_ASHRDI3
|
||||
bool
|
||||
|
||||
config GENERIC_LSHRDI3
|
||||
config GENERIC_LIB_LSHRDI3
|
||||
bool
|
||||
|
||||
config GENERIC_MULDI3
|
||||
config GENERIC_LIB_MULDI3
|
||||
bool
|
||||
|
||||
config GENERIC_CMPDI2
|
||||
config GENERIC_LIB_CMPDI2
|
||||
bool
|
||||
|
||||
config GENERIC_UCMPDI2
|
||||
config GENERIC_LIB_UCMPDI2
|
||||
bool
|
||||
|
||||
12
lib/Makefile
12
lib/Makefile
@ -261,9 +261,9 @@ obj-$(CONFIG_SBITMAP) += sbitmap.o
|
||||
obj-$(CONFIG_PARMAN) += parman.o
|
||||
|
||||
# GCC library routines
|
||||
obj-$(CONFIG_GENERIC_ASHLDI3) += ashldi3.o
|
||||
obj-$(CONFIG_GENERIC_ASHRDI3) += ashrdi3.o
|
||||
obj-$(CONFIG_GENERIC_LSHRDI3) += lshrdi3.o
|
||||
obj-$(CONFIG_GENERIC_MULDI3) += muldi3.o
|
||||
obj-$(CONFIG_GENERIC_CMPDI2) += cmpdi2.o
|
||||
obj-$(CONFIG_GENERIC_UCMPDI2) += ucmpdi2.o
|
||||
obj-$(CONFIG_GENERIC_LIB_ASHLDI3) += ashldi3.o
|
||||
obj-$(CONFIG_GENERIC_LIB_ASHRDI3) += ashrdi3.o
|
||||
obj-$(CONFIG_GENERIC_LIB_LSHRDI3) += lshrdi3.o
|
||||
obj-$(CONFIG_GENERIC_LIB_MULDI3) += muldi3.o
|
||||
obj-$(CONFIG_GENERIC_LIB_CMPDI2) += cmpdi2.o
|
||||
obj-$(CONFIG_GENERIC_LIB_UCMPDI2) += ucmpdi2.o
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/libgcc.h>
|
||||
|
||||
word_type __ucmpdi2(unsigned long long a, unsigned long long b)
|
||||
word_type notrace __ucmpdi2(unsigned long long a, unsigned long long b)
|
||||
{
|
||||
const DWunion au = {.ll = a};
|
||||
const DWunion bu = {.ll = b};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user