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sh: Fix timer-tmu build for SH-3.

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With the TMU register definitions being renamed on SH-4, SH-3 ended up
breaking. Update the TSTR define to match the SH-4 convention.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Nobuhiro Iwamatsu 2007-07-06 10:26:03 +09:00 committed by Paul Mundt
parent 880dec1007
commit 75f016a7ce
1 changed files with 2 additions and 2 deletions
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4
include/asm-sh/cpu-sh3/timer.h
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@ -29,7 +29,7 @@
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
#define TMU_TSTR 0xa412fe92 /* Byte access */ #define TMU_012_TSTR 0xa412fe92 /* Byte access */
#define TMU0_TCOR 0xa412fe94 /* Long access */ #define TMU0_TCOR 0xa412fe94 /* Long access */
#define TMU0_TCNT 0xa412fe98 /* Long access */ #define TMU0_TCNT 0xa412fe98 /* Long access */
@ -44,7 +44,7 @@
#define TMU2_TCR 0xa412feb4 /* Word access */ #define TMU2_TCR 0xa412feb4 /* Word access */
#else #else
#define TMU_TSTR 0xfffffe92 /* Byte access */ #define TMU_012_TSTR 0xfffffe92 /* Byte access */
#define TMU0_TCOR 0xfffffe94 /* Long access */ #define TMU0_TCOR 0xfffffe94 /* Long access */
#define TMU0_TCNT 0xfffffe98 /* Long access */ #define TMU0_TCNT 0xfffffe98 /* Long access */