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x86/entry: Remove the apic/BUILD interrupt leftovers
Remove all the code which was there to emit the system vector stubs. All users are gone. Move the now unused GET_CR2_INTO macro muck to head_64.S where the last user is. Fixup the eye hurting comment there while at it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Andy Lutomirski <luto@kernel.org> Link: https://lore.kernel.org/r/20200521202119.927433002@linutronix.de
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@ -351,23 +351,3 @@ For 32-bit we have the following conventions - kernel is built with
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call stackleak_erase
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call stackleak_erase
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#endif
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#endif
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.endm
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.endm
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/*
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* This does 'call enter_from_user_mode' unless we can avoid it based on
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* kernel config or using the static jump infrastructure.
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*/
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.macro CALL_enter_from_user_mode
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#ifdef CONFIG_CONTEXT_TRACKING
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#ifdef CONFIG_JUMP_LABEL
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STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_key, def=0
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#endif
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call enter_from_user_mode
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.Lafter_call_\@:
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#endif
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.endm
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#ifdef CONFIG_PARAVIRT_XXL
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#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg
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#else
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#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg
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#endif
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@ -1233,24 +1233,6 @@ SYM_FUNC_END(entry_INT80_32)
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#endif
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#endif
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.endm
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.endm
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#define BUILD_INTERRUPT3(name, nr, fn) \
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SYM_FUNC_START(name) \
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ASM_CLAC; \
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pushl $~(nr); \
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SAVE_ALL switch_stacks=1; \
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ENCODE_FRAME_POINTER; \
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TRACE_IRQS_OFF \
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movl %esp, %eax; \
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call fn; \
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jmp ret_from_intr; \
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SYM_FUNC_END(name)
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#define BUILD_INTERRUPT(name, nr) \
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BUILD_INTERRUPT3(name, nr, smp_##name); \
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/* The include is where all of the SMP etc. interrupts come from */
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#include <asm/entry_arch.h>
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#ifdef CONFIG_PARAVIRT
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#ifdef CONFIG_PARAVIRT
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SYM_CODE_START(native_iret)
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SYM_CODE_START(native_iret)
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iret
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iret
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@ -658,108 +658,7 @@ SYM_CODE_END(\asmsym)
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*/
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*/
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#include <asm/idtentry.h>
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#include <asm/idtentry.h>
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/*
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* Interrupt entry helper function.
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*
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* Entry runs with interrupts off. Stack layout at entry:
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* +----------------------------------------------------+
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* | regs->ss |
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* | regs->rsp |
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* | regs->eflags |
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* | regs->cs |
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* | regs->ip |
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* +----------------------------------------------------+
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* | regs->orig_ax = ~(interrupt number) |
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* +----------------------------------------------------+
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* | return address |
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* +----------------------------------------------------+
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*/
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SYM_CODE_START(interrupt_entry)
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UNWIND_HINT_IRET_REGS offset=16
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ASM_CLAC
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cld
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testb $3, CS-ORIG_RAX+8(%rsp)
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jz 1f
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SWAPGS
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FENCE_SWAPGS_USER_ENTRY
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/*
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* Switch to the thread stack. The IRET frame and orig_ax are
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* on the stack, as well as the return address. RDI..R12 are
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* not (yet) on the stack and space has not (yet) been
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* allocated for them.
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*/
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pushq %rdi
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/* Need to switch before accessing the thread stack. */
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SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
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movq %rsp, %rdi
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movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
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/*
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* We have RDI, return address, and orig_ax on the stack on
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* top of the IRET frame. That means offset=24
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*/
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UNWIND_HINT_IRET_REGS base=%rdi offset=24
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pushq 7*8(%rdi) /* regs->ss */
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pushq 6*8(%rdi) /* regs->rsp */
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pushq 5*8(%rdi) /* regs->eflags */
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pushq 4*8(%rdi) /* regs->cs */
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pushq 3*8(%rdi) /* regs->ip */
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UNWIND_HINT_IRET_REGS
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pushq 2*8(%rdi) /* regs->orig_ax */
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pushq 8(%rdi) /* return address */
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movq (%rdi), %rdi
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jmp 2f
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1:
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FENCE_SWAPGS_KERNEL_ENTRY
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2:
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PUSH_AND_CLEAR_REGS save_ret=1
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ENCODE_FRAME_POINTER 8
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testb $3, CS+8(%rsp)
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jz 1f
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/*
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* IRQ from user mode.
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*
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* We need to tell lockdep that IRQs are off. We can't do this until
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* we fix gsbase, and we should do it before enter_from_user_mode
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* (which can take locks). Since TRACE_IRQS_OFF is idempotent,
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* the simplest way to handle it is to just call it twice if
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* we enter from user mode. There's no reason to optimize this since
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* TRACE_IRQS_OFF is a no-op if lockdep is off.
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*/
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TRACE_IRQS_OFF
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CALL_enter_from_user_mode
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1:
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ENTER_IRQ_STACK old_rsp=%rdi save_ret=1
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/* We entered an interrupt context - irqs are off: */
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TRACE_IRQS_OFF
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ret
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SYM_CODE_END(interrupt_entry)
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_ASM_NOKPROBE(interrupt_entry)
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SYM_CODE_START_LOCAL(common_interrupt_return)
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SYM_CODE_START_LOCAL(common_interrupt_return)
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ret_from_intr:
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DISABLE_INTERRUPTS(CLBR_ANY)
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TRACE_IRQS_OFF
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LEAVE_IRQ_STACK
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testb $3, CS(%rsp)
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jz retint_kernel
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/* Interrupt came from user space */
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.Lretint_user:
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mov %rsp,%rdi
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call prepare_exit_to_usermode
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SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_usermode, SYM_L_GLOBAL)
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SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_usermode, SYM_L_GLOBAL)
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#ifdef CONFIG_DEBUG_ENTRY
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#ifdef CONFIG_DEBUG_ENTRY
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/* Assert that pt_regs indicates user mode. */
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/* Assert that pt_regs indicates user mode. */
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@ -802,23 +701,6 @@ SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_usermode, SYM_L_GLOBAL)
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INTERRUPT_RETURN
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INTERRUPT_RETURN
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/* Returning to kernel space */
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retint_kernel:
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#ifdef CONFIG_PREEMPTION
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/* Interrupts are off */
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/* Check if we need preemption */
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btl $9, EFLAGS(%rsp) /* were interrupts off? */
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jnc 1f
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cmpl $0, PER_CPU_VAR(__preempt_count)
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jnz 1f
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call preempt_schedule_irq
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1:
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#endif
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/*
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* The iretq could re-enable interrupts:
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*/
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TRACE_IRQS_IRETQ
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SYM_INNER_LABEL(restore_regs_and_return_to_kernel, SYM_L_GLOBAL)
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SYM_INNER_LABEL(restore_regs_and_return_to_kernel, SYM_L_GLOBAL)
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#ifdef CONFIG_DEBUG_ENTRY
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#ifdef CONFIG_DEBUG_ENTRY
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/* Assert that pt_regs indicates kernel mode. */
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/* Assert that pt_regs indicates kernel mode. */
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@ -931,31 +813,6 @@ native_irq_return_ldt:
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SYM_CODE_END(common_interrupt_return)
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SYM_CODE_END(common_interrupt_return)
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_ASM_NOKPROBE(common_interrupt_return)
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_ASM_NOKPROBE(common_interrupt_return)
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/*
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* APIC interrupts.
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*/
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.macro apicinterrupt3 num sym do_sym
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SYM_CODE_START(\sym)
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UNWIND_HINT_IRET_REGS
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pushq $~(\num)
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call interrupt_entry
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UNWIND_HINT_REGS indirect=1
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call \do_sym /* rdi points to pt_regs */
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jmp ret_from_intr
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SYM_CODE_END(\sym)
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_ASM_NOKPROBE(\sym)
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.endm
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/* Make sure APIC interrupt handlers end up in the irqentry section: */
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#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
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#define POP_SECTION_IRQENTRY .popsection
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.macro apicinterrupt num sym do_sym
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PUSH_SECTION_IRQENTRY
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apicinterrupt3 \num \sym \do_sym
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POP_SECTION_IRQENTRY
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.endm
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/*
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/*
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* Reload gs selector with exception handling
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* Reload gs selector with exception handling
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* edi: new selector
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* edi: new selector
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@ -1,12 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file is designed to contain the BUILD_INTERRUPT specifications for
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* all of the extra named interrupt vectors used by the architecture.
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* Usually this is the Inter Process Interrupts (IPIs)
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*/
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/*
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* The following vectors are part of the Linux architecture, there
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* is no hardware IRQ pin equivalent for them, they are triggered
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* through the ICC by us (IPIs)
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*/
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@ -29,15 +29,16 @@
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#ifdef CONFIG_PARAVIRT_XXL
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#ifdef CONFIG_PARAVIRT_XXL
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#include <asm/asm-offsets.h>
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#include <asm/asm-offsets.h>
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#include <asm/paravirt.h>
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#include <asm/paravirt.h>
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#define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg
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#else
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#else
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#define INTERRUPT_RETURN iretq
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#define INTERRUPT_RETURN iretq
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#define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg
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#endif
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#endif
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/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
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/*
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* We are not able to switch in one step to the final KERNEL ADDRESS SPACE
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* because we need identity-mapped pages.
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* because we need identity-mapped pages.
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*
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*/
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*/
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#define l4_index(x) (((x) >> 39) & 511)
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#define l4_index(x) (((x) >> 39) & 511)
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#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
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#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
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