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mfd: ab8500-sysctrl: Add new reset function
Add a new reset function which uses the AB WD with 0 timeout. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -15,6 +15,12 @@
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/mfd/abx500/ab8500-sysctrl.h>
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/* RtcCtrl bits */
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#define AB8500_ALARM_MIN_LOW 0x08
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#define AB8500_ALARM_MIN_MID 0x09
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#define RTC_CTRL 0x0B
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#define RTC_ALARM_ENABLE 0x4
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static struct device *sysctrl_dev;
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void ab8500_power_off(void)
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@ -79,6 +85,63 @@ shutdown:
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}
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}
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/*
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* Use the AB WD to reset the platform. It will perform a hard
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* reset instead of a soft reset. Write the reset reason to
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* the AB before reset, which can be read upon restart.
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*/
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void ab8500_restart(char mode, const char *cmd)
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{
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struct ab8500_platform_data *plat;
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struct ab8500_sysctrl_platform_data *pdata;
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u16 reason = 0;
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u8 val;
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if (sysctrl_dev == NULL) {
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pr_err("%s: sysctrl not initialized\n", __func__);
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return;
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}
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plat = dev_get_platdata(sysctrl_dev->parent);
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pdata = plat->sysctrl;
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if (pdata->reboot_reason_code)
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reason = pdata->reboot_reason_code(cmd);
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else
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pr_warn("[%s] No reboot reason set. Default reason %d\n",
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__func__, reason);
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/*
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* Disable RTC alarm, just a precaution so that no alarm
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* is running when WD reset is executed.
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*/
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abx500_get_register_interruptible(sysctrl_dev, AB8500_RTC,
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RTC_CTRL , &val);
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abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
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RTC_CTRL , (val & ~RTC_ALARM_ENABLE));
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/*
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* Android is not using the RTC alarm registers during reboot
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* so we borrow them for writing the reason of reset
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*/
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/* reason[8 LSB] */
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val = reason & 0xFF;
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abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
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AB8500_ALARM_MIN_LOW , val);
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/* reason[8 MSB] */
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val = (reason>>8) & 0xFF;
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abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
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AB8500_ALARM_MIN_MID , val);
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/* Setting WD timeout to 0 */
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ab8500_sysctrl_write(AB8500_MAINWDOGTIMER, 0xFF, 0x0);
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/* Setting the parameters to AB8500 WD*/
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ab8500_sysctrl_write(AB8500_MAINWDOGCTRL, 0xFF, (AB8500_ENABLE_WD |
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AB8500_WD_RESTART_ON_EXPIRE | AB8500_KICK_WD));
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}
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static inline bool valid_bank(u8 bank)
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{
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return ((bank == AB8500_SYS_CTRL1_BLOCK) ||
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@ -12,6 +12,7 @@
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int ab8500_sysctrl_read(u16 reg, u8 *value);
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int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
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void ab8500_restart(char mode, const char *cmd);
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#else
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@ -40,6 +41,7 @@ static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
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/* Configuration data for SysClkReq1RfClkBuf - SysClkReq8RfClkBuf */
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struct ab8500_sysctrl_platform_data {
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u8 initial_req_buf_config[8];
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u16 (*reboot_reason_code)(const char *cmd);
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};
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/* Registers */
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@ -299,4 +301,8 @@ struct ab8500_sysctrl_platform_data {
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#define AB9540_SYSCLK12BUF4VALID_SYSCLK12BUF4VALID_MASK 0xFF
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#define AB9540_SYSCLK12BUF4VALID_SYSCLK12BUF4VALID_SHIFT 0
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#define AB8500_ENABLE_WD 0x1
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#define AB8500_KICK_WD 0x2
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#define AB8500_WD_RESTART_ON_EXPIRE 0x10
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#endif /* __AB8500_SYSCTRL_H */
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