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drm/i915/fbc: Introduce intel_fbc_is_compressing()

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Move the direct FBC status register reads from the debugfs code
behind an abstract api.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211104144520.22605-5-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
This commit is contained in:
Ville Syrjälä 2021-11-04 16:45:07 +02:00
parent ef9600ffd4
commit 74e0457a62
3 changed files with 42 additions and 20 deletions
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25
drivers/gpu/drm/i915/display/intel_display_debugfs.c
View File

@ -52,27 +52,12 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
mutex_lock(&fbc->lock);
if (intel_fbc_is_active(dev_priv))
seq_puts(m, "FBC enabled\n");
else
seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
if (intel_fbc_is_active(dev_priv)) {
u32 mask;
if (DISPLAY_VER(dev_priv) >= 8)
mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) & BDW_FBC_COMP_SEG_MASK;
else if (DISPLAY_VER(dev_priv) >= 7)
mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK;
else if (DISPLAY_VER(dev_priv) >= 5)
mask = intel_de_read(dev_priv, ILK_DPFC_STATUS) & ILK_DPFC_COMP_SEG_MASK;
else if (IS_G4X(dev_priv))
mask = intel_de_read(dev_priv, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
else
mask = intel_de_read(dev_priv, FBC_STATUS) &
(FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
seq_printf(m, "Compressing: %s\n", yesno(mask));
seq_puts(m, "FBC enabled\n");
seq_printf(m, "Compressing: %s\n",
yesno(intel_fbc_is_compressing(dev_priv)));
} else {
seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
}
mutex_unlock(&fbc->lock);

36
drivers/gpu/drm/i915/display/intel_fbc.c
View File

@ -211,6 +211,12 @@ static bool i8xx_fbc_is_active(struct drm_i915_private *dev_priv)
return intel_de_read(dev_priv, FBC_CONTROL) & FBC_CTL_EN;
}
static bool i8xx_fbc_is_compressing(struct drm_i915_private *i915)
{
return intel_de_read(i915, FBC_STATUS) &
(FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
}
static u32 g4x_dpfc_ctl_limit(struct drm_i915_private *i915)
{
switch (i915->fbc.limit) {
@ -262,6 +268,11 @@ static bool g4x_fbc_is_active(struct drm_i915_private *dev_priv)
return intel_de_read(dev_priv, DPFC_CONTROL) & DPFC_CTL_EN;
}
static bool g4x_fbc_is_compressing(struct drm_i915_private *i915)
{
return intel_de_read(i915, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
}
static void i8xx_fbc_recompress(struct drm_i915_private *dev_priv)
{
struct intel_fbc_reg_params *params = &dev_priv->fbc.params;
@ -358,6 +369,11 @@ static bool ilk_fbc_is_active(struct drm_i915_private *dev_priv)
return intel_de_read(dev_priv, ILK_DPFC_CONTROL) & DPFC_CTL_EN;
}
static bool ilk_fbc_is_compressing(struct drm_i915_private *i915)
{
return intel_de_read(i915, ILK_DPFC_STATUS) & ILK_DPFC_COMP_SEG_MASK;
}
static void glk_fbc_program_cfb_stride(struct drm_i915_private *i915)
{
struct intel_fbc *fbc = &i915->fbc;
@ -416,6 +432,14 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
}
static bool gen7_fbc_is_compressing(struct drm_i915_private *i915)
{
if (DISPLAY_VER(i915) >= 8)
return intel_de_read(i915, IVB_FBC_STATUS2) & BDW_FBC_COMP_SEG_MASK;
else
return intel_de_read(i915, IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK;
}
static bool intel_fbc_hw_is_active(struct drm_i915_private *dev_priv)
{
if (DISPLAY_VER(dev_priv) >= 5)
@ -461,6 +485,18 @@ static void intel_fbc_hw_deactivate(struct drm_i915_private *dev_priv)
i8xx_fbc_deactivate(dev_priv);
}
bool intel_fbc_is_compressing(struct drm_i915_private *i915)
{
if (DISPLAY_VER(i915) >= 7)
return gen7_fbc_is_compressing(i915);
else if (DISPLAY_VER(i915) >= 5)
return ilk_fbc_is_compressing(i915);
else if (IS_G4X(i915))
return g4x_fbc_is_compressing(i915);
else
return i8xx_fbc_is_compressing(i915);
}
/**
* intel_fbc_is_active - Is FBC active?
* @dev_priv: i915 device instance

1
drivers/gpu/drm/i915/display/intel_fbc.h
View File

@ -19,6 +19,7 @@ struct intel_plane_state;
void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
struct intel_atomic_state *state);
bool intel_fbc_is_active(struct drm_i915_private *dev_priv);
bool intel_fbc_is_compressing(struct drm_i915_private *dev_priv);
bool intel_fbc_pre_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_post_update(struct intel_atomic_state *state,