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e1000e: Remove Other from EIAC
It was reported that emulated e1000e devices in vmware esxi 6.5 Build 7526125 do not link up after commit4aea7a5c5e
("e1000e: Avoid receiver overrun interrupt bursts", v4.15-rc1). Some tracing shows that after e1000e_trigger_lsc() is called, ICR reads out as 0x0 in e1000_msix_other() on emulated e1000e devices. In comparison, on real e1000e 82574 hardware, icr=0x80000004 (_INT_ASSERTED | _LSC) in the same situation. Some experimentation showed that this flaw in vmware e1000e emulation can be worked around by not setting Other in EIAC. This is how it was before16ecba59bc
("e1000e: Do not read ICR in Other interrupt", v4.5-rc1). Fixes:4aea7a5c5e
("e1000e: Avoid receiver overrun interrupt bursts") Signed-off-by: Benjamin Poirier <bpoirier@suse.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1918,6 +1918,8 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
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bool enable = true;
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icr = er32(ICR);
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ew32(ICR, E1000_ICR_OTHER);
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if (icr & E1000_ICR_RXO) {
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ew32(ICR, E1000_ICR_RXO);
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enable = false;
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@ -2040,7 +2042,6 @@ static void e1000_configure_msix(struct e1000_adapter *adapter)
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hw->hw_addr + E1000_EITR_82574(vector));
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else
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writel(1, hw->hw_addr + E1000_EITR_82574(vector));
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adapter->eiac_mask |= E1000_IMS_OTHER;
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/* Cause Tx interrupts on every write back */
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ivar |= BIT(31);
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@ -2265,7 +2266,7 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
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if (adapter->msix_entries) {
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ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
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ew32(IMS, adapter->eiac_mask | E1000_IMS_LSC);
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ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
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} else if (hw->mac.type >= e1000_pch_lpt) {
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ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
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} else {
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