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ARM: shmobile: r8a7791: add MLB+ clock
Add MLB+ clock to R8A7791 device tree. Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> [Sergei: rebased, renamed, added changelog] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -1154,17 +1154,17 @@
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mstp8_clks: mstp8_clks@e6150990 {
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mstp8_clks: mstp8_clks@e6150990 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
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reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
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clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>,
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clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
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<&zs_clk>, <&zs_clk>;
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<&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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clock-indices = <
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clock-indices = <
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R8A7791_CLK_IPMMU_SGX
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R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
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R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
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R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
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R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
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R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
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>;
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>;
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clock-output-names =
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clock-output-names =
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"ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1",
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"ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether",
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"sata0";
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"sata1", "sata0";
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};
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};
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mstp9_clks: mstp9_clks@e6150994 {
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mstp9_clks: mstp9_clks@e6150994 {
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
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@ -92,6 +92,7 @@
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/* MSTP8 */
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/* MSTP8 */
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#define R8A7791_CLK_IPMMU_SGX 0
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#define R8A7791_CLK_IPMMU_SGX 0
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#define R8A7791_CLK_MLB 2
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#define R8A7791_CLK_VIN2 9
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#define R8A7791_CLK_VIN2 9
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#define R8A7791_CLK_VIN1 10
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#define R8A7791_CLK_VIN1 10
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#define R8A7791_CLK_VIN0 11
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#define R8A7791_CLK_VIN0 11
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