ARM: shmobile: r8a7791: add MLB+ clock

Add MLB+ clock to R8A7791 device tree.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Andrey Gusakov 2014-12-18 23:43:03 +03:00 committed by Simon Horman
parent f6b5dd4088
commit 7408d3061d
2 changed files with 6 additions and 5 deletions

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@ -1154,17 +1154,17 @@
mstp8_clks: mstp8_clks@e6150990 { mstp8_clks: mstp8_clks@e6150990 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
<&zs_clk>, <&zs_clk>; <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7791_CLK_IPMMU_SGX R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
>; >;
clock-output-names = clock-output-names =
"ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether",
"sata0"; "sata1", "sata0";
}; };
mstp9_clks: mstp9_clks@e6150994 { mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

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@ -92,6 +92,7 @@
/* MSTP8 */ /* MSTP8 */
#define R8A7791_CLK_IPMMU_SGX 0 #define R8A7791_CLK_IPMMU_SGX 0
#define R8A7791_CLK_MLB 2
#define R8A7791_CLK_VIN2 9 #define R8A7791_CLK_VIN2 9
#define R8A7791_CLK_VIN1 10 #define R8A7791_CLK_VIN1 10
#define R8A7791_CLK_VIN0 11 #define R8A7791_CLK_VIN0 11