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tools/nolibc: Add support for LoongArch
Add support for LoongArch (32 and 64 bit) to nolibc. Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn> Acked-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
This commit is contained in:
Feiyang Chen
Paul E. McKenney
parent
b551cb7dc3
commit
73f12c6da7
200
tools/include/nolibc/arch-loongarch.h
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200
tools/include/nolibc/arch-loongarch.h
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@ -0,0 +1,200 @@
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/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* LoongArch specific definitions for NOLIBC
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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#ifndef _NOLIBC_ARCH_LOONGARCH_H
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#define _NOLIBC_ARCH_LOONGARCH_H
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/* Syscalls for LoongArch :
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* - stack is 16-byte aligned
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* - syscall number is passed in a7
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* - arguments are in a0, a1, a2, a3, a4, a5
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* - the system call is performed by calling "syscall 0"
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* - syscall return comes in a0
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* - the arguments are cast to long and assigned into the target
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* registers which are then simply passed as registers to the asm code,
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* so that we don't have to experience issues with register constraints.
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*
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* On LoongArch, select() is not implemented so we have to use pselect6().
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*/
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#define __ARCH_WANT_SYS_PSELECT6
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#define my_syscall0(num) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0"); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "=r"(_arg1) \
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: "r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_arg2), \
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"r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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register long _arg5 __asm__ ("a4") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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register long _arg5 __asm__ ("a4") = (long)(arg5); \
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register long _arg6 __asm__ ("a5") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"syscall 0\n" \
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: "+r"(_arg1) \
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: "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), "r"(_arg6), \
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"r"(_num) \
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: "memory", "$t0", "$t1", "$t2", "$t3", \
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"$t4", "$t5", "$t6", "$t7", "$t8" \
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); \
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_arg1; \
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})
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char **environ __attribute__((weak));
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const unsigned long *_auxv __attribute__((weak));
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#if __loongarch_grlen == 32
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#define LONGLOG "2"
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#define SZREG "4"
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#define REG_L "ld.w"
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#define LONG_S "st.w"
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#define LONG_ADD "add.w"
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#define LONG_ADDI "addi.w"
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#define LONG_SLL "slli.w"
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#define LONG_BSTRINS "bstrins.w"
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#else // __loongarch_grlen == 64
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#define LONGLOG "3"
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#define SZREG "8"
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#define REG_L "ld.d"
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#define LONG_S "st.d"
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#define LONG_ADD "add.d"
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#define LONG_ADDI "addi.d"
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#define LONG_SLL "slli.d"
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#define LONG_BSTRINS "bstrins.d"
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#endif
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/* startup code */
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void __attribute__((weak,noreturn,optimize("omit-frame-pointer"))) _start(void)
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{
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__asm__ volatile (
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REG_L " $a0, $sp, 0\n" // argc (a0) was in the stack
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LONG_ADDI " $a1, $sp, "SZREG"\n" // argv (a1) = sp + SZREG
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LONG_SLL " $a2, $a0, "LONGLOG"\n" // envp (a2) = SZREG*argc ...
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LONG_ADDI " $a2, $a2, "SZREG"\n" // + SZREG (skip null)
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LONG_ADD " $a2, $a2, $a1\n" // + argv
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"move $a3, $a2\n" // iterate a3 over envp to find auxv (after NULL)
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"0:\n" // do {
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REG_L " $a4, $a3, 0\n" // a4 = *a3;
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LONG_ADDI " $a3, $a3, "SZREG"\n" // a3 += sizeof(void*);
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"bne $a4, $zero, 0b\n" // } while (a4);
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"la.pcrel $a4, _auxv\n" // a4 = &_auxv
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LONG_S " $a3, $a4, 0\n" // store a3 into _auxv
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"la.pcrel $a3, environ\n" // a3 = &environ
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LONG_S " $a2, $a3, 0\n" // store envp(a2) into environ
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LONG_BSTRINS " $sp, $zero, 3, 0\n" // sp must be 16-byte aligned
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"bl main\n" // main() returns the status code, we'll exit with it.
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"li.w $a7, 93\n" // NR_exit == 93
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"syscall 0\n"
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);
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__builtin_unreachable();
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}
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#endif // _NOLIBC_ARCH_LOONGARCH_H
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@ -29,6 +29,8 @@
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#include "arch-riscv.h"
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#elif defined(__s390x__)
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#include "arch-s390.h"
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#elif defined(__loongarch__)
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#include "arch-loongarch.h"
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#endif
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#endif /* _NOLIBC_ARCH_H */
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