ASPEED device tree updates for 5.9

There is one new machine; AMD's EthanolX reference platform with an
 AST2600 BMC.
 
 Misc updates for Rainier, Tacoma, Wedge and Mihawk machines.
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Merge tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.9

There is one new machine; AMD's EthanolX reference platform with an
AST2600 BMC.

Misc updates for Rainier, Tacoma, Wedge and Mihawk machines.

* tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (26 commits)
  ARM: dts: Aspeed: tacoma: Enable EHCI controller
  ARM: dts: aspeed: rainier: Enable EHCI controller
  ARM: dts: aspeed: rainier: Switch OCCs to P10
  ARM: dts: aspeed: rainier: Add FSI I2C masters
  ARM: dts: aspeed: rainier: Add CFAM SPI controllers
  ARM: dts: aspeed: rainier: Add I2C buses for NVMe use
  ARM: dts: aspeed: Initial device tree for AMD EthanolX
  ARM: dts: rainier: Describe GPIO mux on I2C3
  ARM: dts: aspeed: wedge40: Enable pwm_tacho device
  ARM: dts: aspeed: wedge40: Enable ADC device
  ARM: dts: aspeed: wedge40: Disable unused i2c controllers
  ARM: dts: aspeed: cmm: Fixup I2C tree
  ARM: dts: aspeed: tacoma: Add CFAM reset GPIO
  ARM: dts: aspeed: rainier: Add CFAM reset GPIO
  ARM: dts: aspeed: tacoma: Fix gpio-key definitions
  ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP
  ARM: dts: aspeed: rainier: Add second cfam on the hub
  ARM: dts: aspeed: rainier: Add line-name checkstop
  ARM: dts: aspeed: tacoma: Remove checkstop gpio-key
  ARM: dts: aspeed: tacoma: Enable XDMA engine
  ...

Link: https://lore.kernel.org/r/CACPK8Xf_Np7LtcDFhywi6Uk1EgUpb0pVVa+Lr9YEwBRjbjOKCQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-28 09:10:01 +02:00
commit 73bf2131d0
10 changed files with 2125 additions and 104 deletions

View File

@ -1359,6 +1359,7 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-facebook-cmm.dtb \

View File

@ -0,0 +1,219 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 AMD Inc.
// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "AMD EthanolX BMC";
compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
aliases {
serial0 = &uart1;
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
leds {
compatible = "gpio-leds";
fault {
gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
};
identify {
gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
};
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
};
&uart1 {
//Host Console
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart5 {
//BMC Console
status = "okay";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default>;
};
//APML for P0
&i2c0 {
status = "okay";
};
//APML for P1
&i2c1 {
status = "okay";
};
// Thermal Sensors
&i2c7 {
status = "okay";
lm75a@48 {
compatible = "national,lm75a";
reg = <0x48>;
};
lm75a@49 {
compatible = "national,lm75a";
reg = <0x49>;
};
lm75a@4a {
compatible = "national,lm75a";
reg = <0x4a>;
};
lm75a@4b {
compatible = "national,lm75a";
reg = <0x4b>;
};
lm75a@4c {
compatible = "national,lm75a";
reg = <0x4c>;
};
lm75a@4d {
compatible = "national,lm75a";
reg = <0x4d>;
};
lm75a@4e {
compatible = "national,lm75a";
reg = <0x4e>;
};
lm75a@4f {
compatible = "national,lm75a";
reg = <0x4f>;
};
};
&kcs1 {
status = "okay";
kcs_addr = <0x60>;
};
&kcs2 {
status = "okay";
kcs_addr = <0x62>;
};
&kcs4 {
status = "okay";
kcs_addr = <0x97DE>;
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&lpc_ctrl {
//Enable lpc clock
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default
&pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
};

File diff suppressed because it is too large Load Diff

View File

@ -27,6 +27,11 @@
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
ast-adc-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>;
};
};
&wdt1 {
@ -115,14 +120,6 @@
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
@ -131,10 +128,39 @@
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
&adc {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm6_default
&pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
};
};

View File

@ -12,6 +12,23 @@
aliases {
serial4 = &uart5;
i2c16 = &i2c2mux0;
i2c17 = &i2c2mux1;
i2c18 = &i2c2mux2;
i2c19 = &i2c2mux3;
spi10 = &cfam0_spi0;
spi11 = &cfam0_spi1;
spi12 = &cfam0_spi2;
spi13 = &cfam0_spi3;
spi20 = &cfam1_spi0;
spi21 = &cfam1_spi1;
spi22 = &cfam1_spi2;
spi23 = &cfam1_spi3;
spi30 = &cfam2_spi0;
spi31 = &cfam2_spi1;
spi32 = &cfam2_spi2;
spi33 = &cfam2_spi3;
};
chosen {
@ -68,12 +85,51 @@
};
};
i2c2mux: i2cmux {
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
i2c-parent = <&i2c2>;
mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>,
<&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>;
idle-state = <0>;
i2c2mux0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c2mux1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c2mux2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c2mux3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&ehci1 {
status = "okay";
};
&gpio0 {
gpio-line-names =
/*A0-A7*/ "","","","","","","","",
/*B0-B7*/ "","","","","","","","",
/*B0-B7*/ "","","","","","","checkstop","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
@ -86,7 +142,7 @@
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*O0-O7*/ "","","","usb-power","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","",
/*R0-R7*/ "","","","","","","","",
@ -102,6 +158,20 @@
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
pin_mclr_vpp {
gpio-hog;
gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>;
output-high;
line-name = "mclr_vpp";
};
i2c3_mux_oe_n {
gpio-hog;
gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>;
output-high;
line-name = "I2C3_MUX_OE_N";
};
};
&emmc_controller {
@ -118,6 +188,12 @@
#address-cells = <2>;
#size-cells = <0>;
/*
* CFAM Reset is supposed to be active low but pass1 hardware is wired
* active high.
*/
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
@ -129,6 +205,84 @@
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam0_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi2: spi@40 {
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam0_spi3: spi@60 {
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
@ -136,7 +290,7 @@
#size-cells = <0>;
fsi_occ0: occ {
compatible = "ibm,p9-occ";
compatible = "ibm,p10-occ";
};
};
@ -163,6 +317,84 @@
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam1_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi2: spi@40 {
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam1_spi3: spi@60 {
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
@ -170,7 +402,7 @@
#size-cells = <0>;
fsi_occ1: occ {
compatible = "ibm,p9-occ";
compatible = "ibm,p10-occ";
};
};
@ -183,6 +415,116 @@
no-scan-on-init;
};
};
cfam@2,0 {
reg = <2 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <2>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
};
fsi2spi@1c00 {
compatible = "ibm,fsi2spi";
reg = <0x1c00 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam2_spi0: spi@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi1: spi@20 {
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi2: spi@40 {
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
cfam2_spi3: spi@60 {
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
eeprom@0 {
at25,byte-len = <0x80000>;
at25,addr-mode = <4>;
at25,page-size = <256>;
compatible = "atmel,at25";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
};
sbefifo@2400 {
compatible = "ibm,p9-sbefifo";
reg = <0x2400 0x400>;
#address-cells = <1>;
#size-cells = <0>;
fsi_occ2: occ {
compatible = "ibm,p10-occ";
};
};
fsi_hub2: hub@3400 {
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
/* Legacy OCC numbering (to get rid of when userspace is fixed) */
@ -194,6 +536,10 @@
reg = <2>;
};
&fsi_occ2 {
reg = <3>;
};
&ibt {
status = "okay";
};
@ -205,6 +551,21 @@
compatible = "atmel,24c64";
reg = <0x51>;
};
tca9554@40 {
compatible = "ti,tca9554";
reg = <0x40>;
gpio-controller;
#gpio-cells = <2>;
smbus0 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus0";
};
};
};
&i2c1 {
@ -519,6 +880,96 @@
compatible = "atmel,24c64";
reg = <0x51>;
};
pca1: pca9552@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c9 {
@ -656,13 +1107,6 @@
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "alt-bmc";
spi-max-frequency = <50000000>;
};
};
&spi1 {

View File

@ -820,12 +820,50 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus0 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus0";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus9_mux232: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus1 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus1";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus9_mux233: i2c@2 {
@ -855,12 +893,50 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus2 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus2";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus9_mux236: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus3 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus3";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus9_mux237: i2c@2 {
@ -909,12 +985,50 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus4 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus4";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus10_mux240: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus5 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus5";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus10_mux241: i2c@2 {
@ -944,12 +1058,50 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus6 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus6";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus10_mux244: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tca9554@39 {
compatible = "ti,tca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
smbus7 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "smbus7";
};
};
tmp431@4c {
compatible = "ti,tmp401";
reg = <0x4c>;
};
};
bus10_mux245: i2c@2 {

View File

@ -29,76 +29,17 @@
no-map;
reg = <0xb8000000 0x4000000>; /* 64M */
};
};
gpio-keys {
compatible = "gpio-keys";
checkstop {
label = "checkstop";
gpios = <&gpio0 ASPEED_GPIO(E, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(E, 3)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(H, 3)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(E, 5)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
label = "fan0-presence";
gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
reg = <0xbf000000 0x01000000>; /* 16M */
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Q, 7)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio0 ASPEED_GPIO(E, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(E, 3)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
@ -154,6 +95,10 @@
};
};
&ehci1 {
status = "okay";
};
&gpio0 {
gpio-line-names =
/*A0-A7*/ "","","","","","","","",
@ -170,7 +115,7 @@
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "led-rear-power","led-rear-id","","","","","","",
/*O0-O7*/ "led-rear-power","led-rear-id","","usb-power","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","fsi-routing",
/*R0-R7*/ "","","","","","","","",
@ -244,6 +189,7 @@
fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
cfam@0,0 {
reg = <0 0>;
@ -912,3 +858,8 @@
pinctrl-0 = <&pinctrl_lpc_default>,
<&pinctrl_lsirq_default>;
};
&xdma {
status = "okay";
memory-region = <&vga_memory>;
};

View File

@ -27,6 +27,12 @@
reg = <0x98000000 0x04000000>; /* 64M */
};
vga_memory: region@9f000000 {
no-map;
compatible = "shared-dma-pool";
reg = <0x9f000000 0x01000000>; /* 16M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
@ -690,4 +696,9 @@
memory-region = <&video_engine_memory>;
};
&xdma {
status = "okay";
memory-region = <&vga_memory>;
};
#include "ibm-power9-dual.dtsi"

View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include <dt-bindings/clock/aspeed-clock.h>
#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
/ {
model = "Aspeed BMC";
@ -267,8 +268,8 @@
reg = <0x1e6e7000 0x100>;
clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
resets = <&syscon ASPEED_RESET_XDMA>;
interrupts-extended = <&vic 6>, <&scu_ic 2>;
pcie-device = "bmc";
interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
aspeed,pcie-device = "bmc";
aspeed,scu = <&syscon>;
status = "disabled";
};

View File

@ -2,6 +2,7 @@
// Copyright 2019 IBM Corp.
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
#include <dt-bindings/clock/ast2600-clock.h>
/ {
@ -346,22 +347,12 @@
resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
reset-names = "device", "root-complex";
interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<&scu_ic0 2>;
pcie-device = "bmc";
<&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
aspeed,pcie-device = "bmc";
aspeed,scu = <&syscon>;
status = "disabled";
};
video: video@1e700000 {
compatible = "aspeed,ast2600-video-engine";
reg = <0x1e700000 0x1000>;
clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
<&syscon ASPEED_CLK_GATE_ECLK>;
clock-names = "vclk", "eclk";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
gpio0: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;