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habanalabs: change a reset print to debug level

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Currently we have two reset prints per reset. One is in the common
code and one in each asic-specific file.

We can change the asic-specific message to be debug only as we can
know the type of reset being done according to the print in the
common code, which is also easier to maintain.

Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Oded Gabbay 2022-03-30 10:02:06 +03:00 committed by Greg Kroah-Hartman
parent fcadbf5688
commit 738607f005
2 changed files with 5 additions and 5 deletions
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6
drivers/misc/habanalabs/gaudi/gaudi.c
View File

@ -4212,7 +4212,7 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset
} }
if (fw_reset) { if (fw_reset) {
dev_info(hdev->dev, dev_dbg(hdev->dev,
"Firmware performs HARD reset, going to wait %dms\n", "Firmware performs HARD reset, going to wait %dms\n",
reset_timeout_ms); reset_timeout_ms);
@ -4304,11 +4304,11 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset
WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST, WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST,
1 << PSOC_GLOBAL_CONF_SW_ALL_RST_IND_SHIFT); 1 << PSOC_GLOBAL_CONF_SW_ALL_RST_IND_SHIFT);
dev_info(hdev->dev, dev_dbg(hdev->dev,
"Issued HARD reset command, going to wait %dms\n", "Issued HARD reset command, going to wait %dms\n",
reset_timeout_ms); reset_timeout_ms);
} else { } else {
dev_info(hdev->dev, dev_dbg(hdev->dev,
"Firmware performs HARD reset, going to wait %dms\n", "Firmware performs HARD reset, going to wait %dms\n",
reset_timeout_ms); reset_timeout_ms);
} }

4
drivers/misc/habanalabs/goya/goya.c
View File

@ -2825,12 +2825,12 @@ static void goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
goya_set_pll_refclk(hdev); goya_set_pll_refclk(hdev);
WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, RESET_ALL); WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, RESET_ALL);
dev_info(hdev->dev, dev_dbg(hdev->dev,
"Issued HARD reset command, going to wait %dms\n", "Issued HARD reset command, going to wait %dms\n",
reset_timeout_ms); reset_timeout_ms);
} else { } else {
WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, DMA_MME_TPC_RESET); WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, DMA_MME_TPC_RESET);
dev_info(hdev->dev, dev_dbg(hdev->dev,
"Issued SOFT reset command, going to wait %dms\n", "Issued SOFT reset command, going to wait %dms\n",
reset_timeout_ms); reset_timeout_ms);
} }