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drm/amdgpu: replace dce_virtual with amdgpu_vkms (v3)
Move dce_virtual into amdgpu_vkms and update all references to dce_virtual with amdgpu_vkms. v2: Removed more references to dce_virtual. v3: Restored display modes from previous implementation. Signed-off-by: Ryan Taylor <Ryan.Taylor@amd.com> Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
fd922f7a0e
commit
733ee71ae0
drivers/gpu/drm/amd/amdgpu
@ -120,8 +120,7 @@ amdgpu-y += \
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amdgpu-y += \
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dce_v10_0.o \
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dce_v11_0.o \
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amdgpu_vkms.o \
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dce_virtual.o
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amdgpu_vkms.o
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# add GFX block
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amdgpu-y += \
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@ -5,6 +5,15 @@
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#include <drm/drm_vblank.h>
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#include "amdgpu.h"
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#ifdef CONFIG_DRM_AMDGPU_SI
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#include "dce_v6_0.h"
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#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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#include "dce_v8_0.h"
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#endif
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#include "dce_v10_0.h"
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#include "dce_v11_0.h"
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#include "ivsrcid/ivsrcid_vislands30.h"
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#include "amdgpu_vkms.h"
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#include "amdgpu_display.h"
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@ -444,3 +453,189 @@ err_crtc:
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return ret;
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}
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const struct drm_mode_config_funcs amdgpu_vkms_mode_funcs = {
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.fb_create = amdgpu_display_user_framebuffer_create,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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static int amdgpu_vkms_sw_init(void *handle)
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{
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int r, i;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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adev_to_drm(adev)->max_vblank_count = 0;
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adev_to_drm(adev)->mode_config.funcs = &amdgpu_vkms_mode_funcs;
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adev_to_drm(adev)->mode_config.max_width = XRES_MAX;
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adev_to_drm(adev)->mode_config.max_height = YRES_MAX;
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adev_to_drm(adev)->mode_config.preferred_depth = 24;
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adev_to_drm(adev)->mode_config.prefer_shadow = 1;
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adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
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r = amdgpu_display_modeset_create_props(adev);
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if (r)
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return r;
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adev->amdgpu_vkms_output = kcalloc(adev->mode_info.num_crtc, sizeof(struct amdgpu_vkms_output), GFP_KERNEL);
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/* allocate crtcs, encoders, connectors */
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for (i = 0; i < adev->mode_info.num_crtc; i++) {
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r = amdgpu_vkms_output_init(adev_to_drm(adev), &adev->amdgpu_vkms_output[i], i);
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if (r)
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return r;
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}
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drm_kms_helper_poll_init(adev_to_drm(adev));
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adev->mode_info.mode_config_initialized = true;
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return 0;
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}
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static int amdgpu_vkms_sw_fini(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int i = 0;
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for (i = 0; i < adev->mode_info.num_crtc; i++)
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if (adev->mode_info.crtcs[i])
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hrtimer_cancel(&adev->mode_info.crtcs[i]->vblank_timer);
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kfree(adev->mode_info.bios_hardcoded_edid);
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kfree(adev->amdgpu_vkms_output);
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drm_kms_helper_poll_fini(adev_to_drm(adev));
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adev->mode_info.mode_config_initialized = false;
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return 0;
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}
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static int amdgpu_vkms_hw_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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switch (adev->asic_type) {
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#ifdef CONFIG_DRM_AMDGPU_SI
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case CHIP_TAHITI:
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case CHIP_PITCAIRN:
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case CHIP_VERDE:
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case CHIP_OLAND:
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dce_v6_0_disable_dce(adev);
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break;
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#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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case CHIP_BONAIRE:
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case CHIP_HAWAII:
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case CHIP_KAVERI:
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case CHIP_KABINI:
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case CHIP_MULLINS:
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dce_v8_0_disable_dce(adev);
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break;
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#endif
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case CHIP_FIJI:
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case CHIP_TONGA:
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dce_v10_0_disable_dce(adev);
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break;
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case CHIP_CARRIZO:
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case CHIP_STONEY:
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case CHIP_POLARIS10:
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case CHIP_POLARIS11:
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case CHIP_VEGAM:
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dce_v11_0_disable_dce(adev);
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break;
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case CHIP_TOPAZ:
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#ifdef CONFIG_DRM_AMDGPU_SI
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case CHIP_HAINAN:
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#endif
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/* no DCE */
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break;
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default:
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break;
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}
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return 0;
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}
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static int amdgpu_vkms_hw_fini(void *handle)
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{
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return 0;
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}
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static int amdgpu_vkms_suspend(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int r;
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r = drm_mode_config_helper_suspend(adev_to_drm(adev));
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if (r)
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return r;
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return amdgpu_vkms_hw_fini(handle);
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}
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static int amdgpu_vkms_resume(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int r;
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r = amdgpu_vkms_hw_init(handle);
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if (r)
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return r;
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return drm_mode_config_helper_resume(adev_to_drm(adev));
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}
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static bool amdgpu_vkms_is_idle(void *handle)
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{
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return true;
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}
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static int amdgpu_vkms_wait_for_idle(void *handle)
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{
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return 0;
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}
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static int amdgpu_vkms_soft_reset(void *handle)
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{
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return 0;
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}
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static int amdgpu_vkms_set_clockgating_state(void *handle,
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enum amd_clockgating_state state)
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{
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return 0;
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}
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static int amdgpu_vkms_set_powergating_state(void *handle,
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enum amd_powergating_state state)
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{
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return 0;
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}
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static const struct amd_ip_funcs amdgpu_vkms_ip_funcs = {
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.name = "amdgpu_vkms",
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.early_init = NULL,
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.late_init = NULL,
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.sw_init = amdgpu_vkms_sw_init,
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.sw_fini = amdgpu_vkms_sw_fini,
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.hw_init = amdgpu_vkms_hw_init,
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.hw_fini = amdgpu_vkms_hw_fini,
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.suspend = amdgpu_vkms_suspend,
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.resume = amdgpu_vkms_resume,
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.is_idle = amdgpu_vkms_is_idle,
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.wait_for_idle = amdgpu_vkms_wait_for_idle,
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.soft_reset = amdgpu_vkms_soft_reset,
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.set_clockgating_state = amdgpu_vkms_set_clockgating_state,
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.set_powergating_state = amdgpu_vkms_set_powergating_state,
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};
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const struct amdgpu_ip_block_version amdgpu_vkms_ip_block =
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{
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.type = AMD_IP_BLOCK_TYPE_DCE,
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.major = 1,
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.minor = 0,
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.rev = 0,
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.funcs = &amdgpu_vkms_ip_funcs,
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};
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@ -23,7 +23,4 @@ struct amdgpu_vkms_output {
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struct drm_pending_vblank_event *event;
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};
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int amdgpu_vkms_output_init(struct drm_device *dev,
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struct amdgpu_vkms_output *output, int index);
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#endif /* _AMDGPU_VKMS_H_ */
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@ -70,7 +70,7 @@
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#include "amdgpu_dm.h"
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#include "amdgpu_amdkfd.h"
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#include "dce_virtual.h"
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#include "amdgpu_vkms.h"
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static const struct amdgpu_video_codec_info cik_video_codecs_encode_array[] =
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{
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@ -2259,7 +2259,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
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amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
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if (adev->enable_virtual_display)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
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#if defined(CONFIG_DRM_AMD_DC)
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else if (amdgpu_device_has_dc_support(adev))
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amdgpu_device_ip_block_add(adev, &dm_ip_block);
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@ -2277,7 +2277,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
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amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
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if (adev->enable_virtual_display)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
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#if defined(CONFIG_DRM_AMD_DC)
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else if (amdgpu_device_has_dc_support(adev))
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amdgpu_device_ip_block_add(adev, &dm_ip_block);
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@ -2295,7 +2295,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
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amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
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if (adev->enable_virtual_display)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
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#if defined(CONFIG_DRM_AMD_DC)
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else if (amdgpu_device_has_dc_support(adev))
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amdgpu_device_ip_block_add(adev, &dm_ip_block);
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@ -2315,7 +2315,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
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amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
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amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
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if (adev->enable_virtual_display)
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amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
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amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
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#if defined(CONFIG_DRM_AMD_DC)
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else if (amdgpu_device_has_dc_support(adev))
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amdgpu_device_ip_block_add(adev, &dm_ip_block);
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@ -1,223 +0,0 @@
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <drm/drm_atomic_helper.h>
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#include "amdgpu.h"
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#ifdef CONFIG_DRM_AMDGPU_SI
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#include "dce_v6_0.h"
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#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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#include "dce_v8_0.h"
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#endif
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#include "dce_v10_0.h"
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#include "dce_v11_0.h"
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#include "dce_virtual.h"
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#include "ivsrcid/ivsrcid_vislands30.h"
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#include "amdgpu_display.h"
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#include "amdgpu_vkms.h"
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const struct drm_mode_config_funcs dce_virtual_mode_funcs = {
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.fb_create = amdgpu_display_user_framebuffer_create,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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};
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static int dce_virtual_sw_init(void *handle)
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{
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int r, i;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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adev_to_drm(adev)->max_vblank_count = 0;
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adev_to_drm(adev)->mode_config.funcs = &dce_virtual_mode_funcs;
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adev_to_drm(adev)->mode_config.max_width = XRES_MAX;
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adev_to_drm(adev)->mode_config.max_height = YRES_MAX;
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adev_to_drm(adev)->mode_config.preferred_depth = 24;
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adev_to_drm(adev)->mode_config.prefer_shadow = 1;
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adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
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r = amdgpu_display_modeset_create_props(adev);
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if (r)
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return r;
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adev->amdgpu_vkms_output = kcalloc(adev->mode_info.num_crtc, sizeof(struct amdgpu_vkms_output), GFP_KERNEL);
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/* allocate crtcs, encoders, connectors */
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for (i = 0; i < adev->mode_info.num_crtc; i++) {
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r = amdgpu_vkms_output_init(adev_to_drm(adev), &adev->amdgpu_vkms_output[i], i);
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if (r)
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return r;
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}
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drm_kms_helper_poll_init(adev_to_drm(adev));
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adev->mode_info.mode_config_initialized = true;
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return 0;
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}
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static int dce_virtual_sw_fini(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int i = 0;
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for (i = 0; i < adev->mode_info.num_crtc; i++)
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if (adev->mode_info.crtcs[i])
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hrtimer_cancel(&adev->mode_info.crtcs[i]->vblank_timer);
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kfree(adev->mode_info.bios_hardcoded_edid);
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kfree(adev->amdgpu_vkms_output);
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drm_kms_helper_poll_fini(adev_to_drm(adev));
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adev->mode_info.mode_config_initialized = false;
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return 0;
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}
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static int dce_virtual_hw_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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switch (adev->asic_type) {
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#ifdef CONFIG_DRM_AMDGPU_SI
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case CHIP_TAHITI:
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case CHIP_PITCAIRN:
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case CHIP_VERDE:
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case CHIP_OLAND:
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dce_v6_0_disable_dce(adev);
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break;
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#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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case CHIP_BONAIRE:
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case CHIP_HAWAII:
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case CHIP_KAVERI:
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case CHIP_KABINI:
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case CHIP_MULLINS:
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dce_v8_0_disable_dce(adev);
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break;
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#endif
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case CHIP_FIJI:
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case CHIP_TONGA:
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dce_v10_0_disable_dce(adev);
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break;
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case CHIP_CARRIZO:
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case CHIP_STONEY:
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case CHIP_POLARIS10:
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case CHIP_POLARIS11:
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case CHIP_VEGAM:
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dce_v11_0_disable_dce(adev);
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break;
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case CHIP_TOPAZ:
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#ifdef CONFIG_DRM_AMDGPU_SI
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case CHIP_HAINAN:
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#endif
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/* no DCE */
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break;
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default:
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break;
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}
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return 0;
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}
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static int dce_virtual_hw_fini(void *handle)
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{
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return 0;
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}
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static int dce_virtual_suspend(void *handle)
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{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
int r;
|
||||
|
||||
r = drm_mode_config_helper_suspend(adev_to_drm(adev));
|
||||
if (r)
|
||||
return r;
|
||||
return dce_virtual_hw_fini(handle);
|
||||
}
|
||||
|
||||
static int dce_virtual_resume(void *handle)
|
||||
{
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
int r;
|
||||
|
||||
r = dce_virtual_hw_init(handle);
|
||||
if (r)
|
||||
return r;
|
||||
return drm_mode_config_helper_resume(adev_to_drm(adev));
|
||||
}
|
||||
|
||||
static bool dce_virtual_is_idle(void *handle)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static int dce_virtual_wait_for_idle(void *handle)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dce_virtual_soft_reset(void *handle)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dce_virtual_set_clockgating_state(void *handle,
|
||||
enum amd_clockgating_state state)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dce_virtual_set_powergating_state(void *handle,
|
||||
enum amd_powergating_state state)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct amd_ip_funcs dce_virtual_ip_funcs = {
|
||||
.name = "dce_virtual",
|
||||
.early_init = NULL,
|
||||
.late_init = NULL,
|
||||
.sw_init = dce_virtual_sw_init,
|
||||
.sw_fini = dce_virtual_sw_fini,
|
||||
.hw_init = dce_virtual_hw_init,
|
||||
.hw_fini = dce_virtual_hw_fini,
|
||||
.suspend = dce_virtual_suspend,
|
||||
.resume = dce_virtual_resume,
|
||||
.is_idle = dce_virtual_is_idle,
|
||||
.wait_for_idle = dce_virtual_wait_for_idle,
|
||||
.soft_reset = dce_virtual_soft_reset,
|
||||
.set_clockgating_state = dce_virtual_set_clockgating_state,
|
||||
.set_powergating_state = dce_virtual_set_powergating_state,
|
||||
};
|
||||
|
||||
const struct amdgpu_ip_block_version dce_virtual_ip_block =
|
||||
{
|
||||
.type = AMD_IP_BLOCK_TYPE_DCE,
|
||||
.major = 1,
|
||||
.minor = 0,
|
||||
.rev = 0,
|
||||
.funcs = &dce_virtual_ip_funcs,
|
||||
};
|
@ -1,30 +0,0 @@
|
||||
/*
|
||||
* Copyright 2014 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __DCE_VIRTUAL_H__
|
||||
#define __DCE_VIRTUAL_H__
|
||||
|
||||
extern const struct amdgpu_ip_block_version dce_virtual_ip_block;
|
||||
|
||||
#endif
|
||||
|
@ -58,7 +58,7 @@
|
||||
#include "jpeg_v2_0.h"
|
||||
#include "vcn_v3_0.h"
|
||||
#include "jpeg_v3_0.h"
|
||||
#include "dce_virtual.h"
|
||||
#include "amdgpu_vkms.h"
|
||||
#include "mes_v10_1.h"
|
||||
#include "mxgpu_nv.h"
|
||||
#include "smuio_v11_0.h"
|
||||
@ -721,7 +721,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
!amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -749,7 +749,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -779,7 +779,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
is_support_sw_smu(adev))
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -802,7 +802,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
is_support_sw_smu(adev))
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -823,7 +823,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -843,7 +843,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
is_support_sw_smu(adev))
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -865,7 +865,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -883,11 +883,11 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -905,7 +905,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
}
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
|
||||
break;
|
||||
|
@ -44,7 +44,7 @@
|
||||
#include "dce_v6_0.h"
|
||||
#include "si.h"
|
||||
#include "uvd_v3_1.h"
|
||||
#include "dce_virtual.h"
|
||||
#include "amdgpu_vkms.h"
|
||||
#include "gca/gfx_6_0_d.h"
|
||||
#include "oss/oss_1_0_d.h"
|
||||
#include "oss/oss_1_0_sh_mask.h"
|
||||
@ -2759,7 +2759,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC) && defined(CONFIG_DRM_AMD_DC_SI)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2777,7 +2777,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC) && defined(CONFIG_DRM_AMD_DC_SI)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2795,7 +2795,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
|
@ -74,7 +74,7 @@
|
||||
#include "smuio_v9_0.h"
|
||||
#include "smuio_v11_0.h"
|
||||
#include "smuio_v13_0.h"
|
||||
#include "dce_virtual.h"
|
||||
#include "amdgpu_vkms.h"
|
||||
#include "mxgpu_ai.h"
|
||||
#include "amdgpu_ras.h"
|
||||
#include "amdgpu_xgmi.h"
|
||||
@ -843,7 +843,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
}
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -863,7 +863,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -885,7 +885,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
|
||||
}
|
||||
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
|
||||
@ -909,7 +909,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
|
@ -77,7 +77,7 @@
|
||||
#if defined(CONFIG_DRM_AMD_ACP)
|
||||
#include "amdgpu_acp.h"
|
||||
#endif
|
||||
#include "dce_virtual.h"
|
||||
#include "amdgpu_vkms.h"
|
||||
#include "mxgpu_vi.h"
|
||||
#include "amdgpu_dm.h"
|
||||
|
||||
@ -2102,7 +2102,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
break;
|
||||
case CHIP_FIJI:
|
||||
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
|
||||
@ -2112,7 +2112,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2132,7 +2132,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2155,7 +2155,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
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amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2173,7 +2173,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
@ -2194,7 +2194,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
|
||||
amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
|
||||
if (adev->enable_virtual_display)
|
||||
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
|
||||
amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
|
||||
#if defined(CONFIG_DRM_AMD_DC)
|
||||
else if (amdgpu_device_has_dc_support(adev))
|
||||
amdgpu_device_ip_block_add(adev, &dm_ip_block);
|
||||
|
Loading…
Reference in New Issue
Block a user