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Merge branch 'pci/mjg-pci-roms-from-efi' into next
* pci/mjg-pci-roms-from-efi: x86: Use PCI setup data PCI: Add support for non-BAR ROMs PCI: Add pcibios_add_device EFI: Stash ROMs if they're not in the PCI BAR
This commit is contained in:
commit
72e1e868ca
@ -8,6 +8,7 @@
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* ----------------------------------------------------------------------- */
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#include <linux/efi.h>
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#include <linux/pci.h>
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#include <asm/efi.h>
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#include <asm/setup.h>
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#include <asm/desc.h>
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@ -243,6 +244,121 @@ static void find_bits(unsigned long mask, u8 *pos, u8 *size)
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*size = len;
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}
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static efi_status_t setup_efi_pci(struct boot_params *params)
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{
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efi_pci_io_protocol *pci;
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efi_status_t status;
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void **pci_handle;
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efi_guid_t pci_proto = EFI_PCI_IO_PROTOCOL_GUID;
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unsigned long nr_pci, size = 0;
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int i;
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struct setup_data *data;
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data = (struct setup_data *)params->hdr.setup_data;
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while (data && data->next)
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data = (struct setup_data *)data->next;
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status = efi_call_phys5(sys_table->boottime->locate_handle,
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EFI_LOCATE_BY_PROTOCOL, &pci_proto,
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NULL, &size, pci_handle);
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if (status == EFI_BUFFER_TOO_SMALL) {
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status = efi_call_phys3(sys_table->boottime->allocate_pool,
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EFI_LOADER_DATA, size, &pci_handle);
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if (status != EFI_SUCCESS)
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return status;
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status = efi_call_phys5(sys_table->boottime->locate_handle,
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EFI_LOCATE_BY_PROTOCOL, &pci_proto,
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NULL, &size, pci_handle);
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}
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if (status != EFI_SUCCESS)
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goto free_handle;
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nr_pci = size / sizeof(void *);
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for (i = 0; i < nr_pci; i++) {
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void *h = pci_handle[i];
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uint64_t attributes;
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struct pci_setup_rom *rom;
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status = efi_call_phys3(sys_table->boottime->handle_protocol,
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h, &pci_proto, &pci);
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if (status != EFI_SUCCESS)
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continue;
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if (!pci)
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continue;
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status = efi_call_phys4(pci->attributes, pci,
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EfiPciIoAttributeOperationGet, 0,
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&attributes);
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if (status != EFI_SUCCESS)
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continue;
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if (!attributes & EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM)
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continue;
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if (!pci->romimage || !pci->romsize)
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continue;
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size = pci->romsize + sizeof(*rom);
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status = efi_call_phys3(sys_table->boottime->allocate_pool,
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EFI_LOADER_DATA, size, &rom);
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if (status != EFI_SUCCESS)
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continue;
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rom->data.type = SETUP_PCI;
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rom->data.len = size - sizeof(struct setup_data);
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rom->data.next = 0;
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rom->pcilen = pci->romsize;
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status = efi_call_phys5(pci->pci.read, pci,
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EfiPciIoWidthUint16, PCI_VENDOR_ID,
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1, &(rom->vendor));
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if (status != EFI_SUCCESS)
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goto free_struct;
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status = efi_call_phys5(pci->pci.read, pci,
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EfiPciIoWidthUint16, PCI_DEVICE_ID,
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1, &(rom->devid));
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if (status != EFI_SUCCESS)
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goto free_struct;
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status = efi_call_phys5(pci->get_location, pci,
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&(rom->segment), &(rom->bus),
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&(rom->device), &(rom->function));
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if (status != EFI_SUCCESS)
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goto free_struct;
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memcpy(rom->romdata, pci->romimage, pci->romsize);
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if (data)
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data->next = (uint64_t)rom;
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else
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params->hdr.setup_data = (uint64_t)rom;
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data = (struct setup_data *)rom;
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continue;
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free_struct:
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efi_call_phys1(sys_table->boottime->free_pool, rom);
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}
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free_handle:
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efi_call_phys1(sys_table->boottime->free_pool, pci_handle);
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return status;
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}
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/*
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* See if we have Graphics Output Protocol
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*/
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@ -1026,6 +1142,8 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table,
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setup_graphics(boot_params);
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setup_efi_pci(boot_params);
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status = efi_call_phys3(sys_table->boottime->allocate_pool,
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EFI_LOADER_DATA, sizeof(*gdt),
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(void **)&gdt);
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@ -13,6 +13,7 @@
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#define SETUP_NONE 0
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#define SETUP_E820_EXT 1
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#define SETUP_DTB 2
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#define SETUP_PCI 3
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/* extensible setup data list node */
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struct setup_data {
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@ -171,4 +171,16 @@ cpumask_of_pcibus(const struct pci_bus *bus)
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}
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#endif
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struct pci_setup_rom {
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struct setup_data data;
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uint16_t vendor;
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uint16_t devid;
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uint64_t pcilen;
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unsigned long segment;
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unsigned long bus;
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unsigned long device;
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unsigned long function;
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uint8_t romdata[0];
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};
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#endif /* _ASM_X86_PCI_H */
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@ -143,11 +143,7 @@ int default_check_phys_apicid_present(int phys_apicid)
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}
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#endif
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#ifndef CONFIG_DEBUG_BOOT_PARAMS
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struct boot_params __initdata boot_params;
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#else
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struct boot_params boot_params;
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#endif
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/*
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* Machine setup..
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@ -17,6 +17,7 @@
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/pci_x86.h>
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#include <asm/setup.h>
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unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
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PCI_PROBE_MMCONF;
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@ -608,6 +609,35 @@ unsigned int pcibios_assign_all_busses(void)
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return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
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}
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int pcibios_add_device(struct pci_dev *dev)
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{
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struct setup_data *data;
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struct pci_setup_rom *rom;
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u64 pa_data;
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pa_data = boot_params.hdr.setup_data;
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while (pa_data) {
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data = phys_to_virt(pa_data);
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if (data->type == SETUP_PCI) {
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rom = (struct pci_setup_rom *)data;
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if ((pci_domain_nr(dev->bus) == rom->segment) &&
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(dev->bus->number == rom->bus) &&
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(PCI_SLOT(dev->devfn) == rom->device) &&
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(PCI_FUNC(dev->devfn) == rom->function) &&
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(dev->vendor == rom->vendor) &&
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(dev->device == rom->devid)) {
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dev->rom = (void *)(unsigned long)(pa_data +
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offsetof(struct pci_setup_rom, romdata));
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dev->romlen = rom->pcilen;
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}
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}
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pa_data = data->next;
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}
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return 0;
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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int err;
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@ -170,6 +170,11 @@ int pci_bus_add_device(struct pci_dev *dev)
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int retval;
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pci_fixup_device(pci_fixup_final, dev);
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retval = pcibios_add_device(dev);
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if (retval)
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return retval;
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retval = device_add(&dev->dev);
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if (retval)
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return retval;
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@ -1333,6 +1333,19 @@ void pcim_pin_device(struct pci_dev *pdev)
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dr->pinned = 1;
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}
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/*
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* pcibios_add_device - provide arch specific hooks when adding device dev
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* @dev: the PCI device being added
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*
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* Permits the platform to provide architecture specific functionality when
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* devices are added. This is the default implementation. Architecture
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* implementations can override this.
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*/
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int __weak pcibios_add_device (struct pci_dev *dev)
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{
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return 0;
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}
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/**
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* pcibios_disable_device - disable arch specific PCI resources for device dev
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* @dev: the PCI device to disable
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@ -117,12 +117,18 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
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loff_t start;
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void __iomem *rom;
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/*
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* Some devices may provide ROMs via a source other than the BAR
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*/
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if (pdev->rom && pdev->romlen) {
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*size = pdev->romlen;
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return phys_to_virt((phys_addr_t)pdev->rom);
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/*
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* IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
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* memory map if the VGA enable bit of the Bridge Control register is
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* set for embedded VGA.
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*/
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if (res->flags & IORESOURCE_ROM_SHADOW) {
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} else if (res->flags & IORESOURCE_ROM_SHADOW) {
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/* primary video rom always starts here */
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start = (loff_t)0xC0000;
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*size = 0x20000; /* cover C000:0 through E000:0 */
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@ -181,7 +187,8 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
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if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
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return;
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iounmap(rom);
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if (!pdev->rom || !pdev->romlen)
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iounmap(rom);
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/* Disable again before continuing, leave enabled if pci=rom */
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if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW)))
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void *create_event_ex;
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} efi_boot_services_t;
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typedef enum {
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EfiPciIoWidthUint8,
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EfiPciIoWidthUint16,
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EfiPciIoWidthUint32,
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EfiPciIoWidthUint64,
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EfiPciIoWidthFifoUint8,
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EfiPciIoWidthFifoUint16,
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EfiPciIoWidthFifoUint32,
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EfiPciIoWidthFifoUint64,
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EfiPciIoWidthFillUint8,
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EfiPciIoWidthFillUint16,
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EfiPciIoWidthFillUint32,
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EfiPciIoWidthFillUint64,
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EfiPciIoWidthMaximum
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} EFI_PCI_IO_PROTOCOL_WIDTH;
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typedef enum {
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EfiPciIoAttributeOperationGet,
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EfiPciIoAttributeOperationSet,
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EfiPciIoAttributeOperationEnable,
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EfiPciIoAttributeOperationDisable,
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EfiPciIoAttributeOperationSupported,
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EfiPciIoAttributeOperationMaximum
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} EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
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typedef struct {
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void *read;
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void *write;
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} efi_pci_io_protocol_access_t;
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typedef struct {
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void *poll_mem;
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void *poll_io;
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efi_pci_io_protocol_access_t mem;
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efi_pci_io_protocol_access_t io;
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efi_pci_io_protocol_access_t pci;
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void *copy_mem;
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void *map;
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void *unmap;
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void *allocate_buffer;
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void *free_buffer;
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void *flush;
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void *get_location;
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void *attributes;
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void *get_bar_attributes;
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void *set_bar_attributes;
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uint64_t romsize;
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void *romimage;
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} efi_pci_io_protocol;
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#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004
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#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010
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#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
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#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
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#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200
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#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800
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#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000
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#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000
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#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
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#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000
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#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
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#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000
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/*
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* Types and defines for EFI ResetSystem
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*/
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@ -333,6 +333,8 @@ struct pci_dev {
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};
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struct pci_ats *ats; /* Address Translation Service */
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#endif
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void *rom; /* Physical pointer to ROM if it's not from the BAR */
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size_t romlen; /* Length of ROM if it's not from the BAR */
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};
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static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
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@ -1599,6 +1601,7 @@ void pcibios_disable_device(struct pci_dev *dev);
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void pcibios_set_master(struct pci_dev *dev);
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int pcibios_set_pcie_reset_state(struct pci_dev *dev,
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enum pcie_reset_state state);
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int pcibios_add_device(struct pci_dev *dev);
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#ifdef CONFIG_PCI_MMCONFIG
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extern void __init pci_mmcfg_early_init(void);
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