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fpga: dfl: fme: add performance reporting support
This patch adds support for performance reporting private feature for FPGA Management Engine (FME). Now it supports several different performance counters, including 'basic', 'cache', 'fabric', 'vtd' and 'vtd_sip'. It allows user to use standard linux tools to access these performance counters. e.g. List all events by "perf list" perf list | grep fme dfl_fme0/cache_read_hit/ [Kernel PMU event] dfl_fme0/cache_read_miss/ [Kernel PMU event] ... dfl_fme0/fab_mmio_read/ [Kernel PMU event] dfl_fme0/fab_mmio_write/ [Kernel PMU event] ... dfl_fme0/fab_port_mmio_read,portid=?/ [Kernel PMU event] dfl_fme0/fab_port_mmio_write,portid=?/ [Kernel PMU event] ... dfl_fme0/vtd_port_devtlb_1g_fill,portid=?/ [Kernel PMU event] dfl_fme0/vtd_port_devtlb_2m_fill,portid=?/ [Kernel PMU event] ... dfl_fme0/vtd_sip_iotlb_1g_hit/ [Kernel PMU event] dfl_fme0/vtd_sip_iotlb_1g_miss/ [Kernel PMU event] ... dfl_fme0/clock [Kernel PMU event] ... e.g. check increased counter value after run one application using "perf stat" command. perf stat -e dfl_fme0/fab_mmio_read/,dfl_fme0/fab_mmio_write/ ./test Performance counter stats for './test': 1 dfl_fme0/fab_mmio_read/ 2 dfl_fme0/fab_mmio_write/ 1.009496520 seconds time elapsed Please note that fabric counters support both fab_* and fab_port_*, but actually they are sharing one set of performance counters in hardware. If user wants to monitor overall data events on fab_* then fab_port_* can't be supported at the same time, see example below: perf stat -e dfl_fme0/fab_mmio_read/,dfl_fme0/fab_port_mmio_write,portid=0/ Performance counter stats for 'system wide': 0 dfl_fme0/fab_mmio_read/ <not supported> dfl_fme0/fab_port_mmio_write,portid=0/ 2.141064085 seconds time elapsed Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Link: https://lore.kernel.org/r/1587949583-12058-3-git-send-email-hao.wu@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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104
Documentation/ABI/testing/sysfs-bus-event_source-devices-dfl_fme
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104
Documentation/ABI/testing/sysfs-bus-event_source-devices-dfl_fme
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What: /sys/bus/event_source/devices/dfl_fmeX/format
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Date: April 2020
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KernelVersion: 5.8
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Contact: Wu Hao <hao.wu@intel.com>
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Description: Read-only. Attribute group to describe the magic bits
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that go into perf_event_attr.config for a particular pmu.
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(See ABI/testing/sysfs-bus-event_source-devices-format).
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Each attribute under this group defines a bit range of the
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perf_event_attr.config. All supported attributes are listed
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below.
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event = "config:0-11" - event ID
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evtype = "config:12-15" - event type
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portid = "config:16-23" - event source
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For example,
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fab_mmio_read = "event=0x06,evtype=0x02,portid=0xff"
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It shows this fab_mmio_read is a fabric type (0x02) event with
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0x06 local event id for overall monitoring (portid=0xff).
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What: /sys/bus/event_source/devices/dfl_fmeX/cpumask
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Date: April 2020
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KernelVersion: 5.8
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Contact: Wu Hao <hao.wu@intel.com>
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Description: Read-only. This file always returns cpu which the PMU is bound
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for access to all fme pmu performance monitoring events.
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What: /sys/bus/event_source/devices/dfl_fmeX/events
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Date: April 2020
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KernelVersion: 5.8
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Contact: Wu Hao <hao.wu@intel.com>
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Description: Read-only. Attribute group to describe performance monitoring
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events specific to fme. Each attribute in this group describes
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a single performance monitoring event supported by this fme pmu.
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The name of the file is the name of the event.
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(See ABI/testing/sysfs-bus-event_source-devices-events).
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All supported performance monitoring events are listed below.
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Basic events (evtype=0x00)
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clock = "event=0x00,evtype=0x00,portid=0xff"
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Cache events (evtype=0x01)
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cache_read_hit = "event=0x00,evtype=0x01,portid=0xff"
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cache_read_miss = "event=0x01,evtype=0x01,portid=0xff"
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cache_write_hit = "event=0x02,evtype=0x01,portid=0xff"
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cache_write_miss = "event=0x03,evtype=0x01,portid=0xff"
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cache_hold_request = "event=0x05,evtype=0x01,portid=0xff"
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cache_data_write_port_contention =
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"event=0x06,evtype=0x01,portid=0xff"
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cache_tag_write_port_contention =
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"event=0x07,evtype=0x01,portid=0xff"
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cache_tx_req_stall = "event=0x08,evtype=0x01,portid=0xff"
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cache_rx_req_stall = "event=0x09,evtype=0x01,portid=0xff"
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cache_eviction = "event=0x0a,evtype=0x01,portid=0xff"
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Fabric events (evtype=0x02)
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fab_pcie0_read = "event=0x00,evtype=0x02,portid=0xff"
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fab_pcie0_write = "event=0x01,evtype=0x02,portid=0xff"
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fab_pcie1_read = "event=0x02,evtype=0x02,portid=0xff"
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fab_pcie1_write = "event=0x03,evtype=0x02,portid=0xff"
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fab_upi_read = "event=0x04,evtype=0x02,portid=0xff"
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fab_upi_write = "event=0x05,evtype=0x02,portid=0xff"
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fab_mmio_read = "event=0x06,evtype=0x02,portid=0xff"
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fab_mmio_write = "event=0x07,evtype=0x02,portid=0xff"
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fab_port_pcie0_read = "event=0x00,evtype=0x02,portid=?"
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fab_port_pcie0_write = "event=0x01,evtype=0x02,portid=?"
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fab_port_pcie1_read = "event=0x02,evtype=0x02,portid=?"
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fab_port_pcie1_write = "event=0x03,evtype=0x02,portid=?"
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fab_port_upi_read = "event=0x04,evtype=0x02,portid=?"
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fab_port_upi_write = "event=0x05,evtype=0x02,portid=?"
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fab_port_mmio_read = "event=0x06,evtype=0x02,portid=?"
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fab_port_mmio_write = "event=0x07,evtype=0x02,portid=?"
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VTD events (evtype=0x03)
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vtd_port_read_transaction = "event=0x00,evtype=0x03,portid=?"
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vtd_port_write_transaction = "event=0x01,evtype=0x03,portid=?"
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vtd_port_devtlb_read_hit = "event=0x02,evtype=0x03,portid=?"
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vtd_port_devtlb_write_hit = "event=0x03,evtype=0x03,portid=?"
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vtd_port_devtlb_4k_fill = "event=0x04,evtype=0x03,portid=?"
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vtd_port_devtlb_2m_fill = "event=0x05,evtype=0x03,portid=?"
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vtd_port_devtlb_1g_fill = "event=0x06,evtype=0x03,portid=?"
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VTD SIP events (evtype=0x04)
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vtd_sip_iotlb_4k_hit = "event=0x00,evtype=0x04,portid=0xff"
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vtd_sip_iotlb_2m_hit = "event=0x01,evtype=0x04,portid=0xff"
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vtd_sip_iotlb_1g_hit = "event=0x02,evtype=0x04,portid=0xff"
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vtd_sip_slpwc_l3_hit = "event=0x03,evtype=0x04,portid=0xff"
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vtd_sip_slpwc_l4_hit = "event=0x04,evtype=0x04,portid=0xff"
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vtd_sip_rcc_hit = "event=0x05,evtype=0x04,portid=0xff"
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vtd_sip_iotlb_4k_miss = "event=0x06,evtype=0x04,portid=0xff"
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vtd_sip_iotlb_2m_miss = "event=0x07,evtype=0x04,portid=0xff"
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vtd_sip_iotlb_1g_miss = "event=0x08,evtype=0x04,portid=0xff"
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vtd_sip_slpwc_l3_miss = "event=0x09,evtype=0x04,portid=0xff"
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vtd_sip_slpwc_l4_miss = "event=0x0a,evtype=0x04,portid=0xff"
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vtd_sip_rcc_miss = "event=0x0b,evtype=0x04,portid=0xff"
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@ -156,7 +156,7 @@ config FPGA_DFL
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config FPGA_DFL_FME
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tristate "FPGA DFL FME Driver"
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depends on FPGA_DFL && HWMON
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depends on FPGA_DFL && HWMON && PERF_EVENTS
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help
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The FPGA Management Engine (FME) is a feature device implemented
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under Device Feature List (DFL) framework. Select this option to
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@ -40,6 +40,7 @@ obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o
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obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o
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dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o
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dfl-fme-objs += dfl-fme-perf.o
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dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o
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dfl-afu-objs += dfl-afu-error.o
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@ -579,6 +579,10 @@ static struct dfl_feature_driver fme_feature_drvs[] = {
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.id_table = fme_power_mgmt_id_table,
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.ops = &fme_power_mgmt_ops,
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},
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{
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.id_table = fme_perf_id_table,
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.ops = &fme_perf_ops,
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},
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{
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.ops = NULL,
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},
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1020
drivers/fpga/dfl-fme-perf.c
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1020
drivers/fpga/dfl-fme-perf.c
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File diff suppressed because it is too large
Load Diff
@ -38,5 +38,7 @@ extern const struct dfl_feature_id fme_pr_mgmt_id_table[];
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extern const struct dfl_feature_ops fme_global_err_ops;
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extern const struct dfl_feature_id fme_global_err_id_table[];
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extern const struct attribute_group fme_global_err_group;
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extern const struct dfl_feature_ops fme_perf_ops;
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extern const struct dfl_feature_id fme_perf_id_table[];
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#endif /* __DFL_FME_H */
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@ -197,12 +197,14 @@ struct dfl_feature_driver {
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* feature dev (platform device)'s reources.
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* @ioaddr: mapped mmio resource address.
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* @ops: ops of this sub feature.
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* @priv: priv data of this feature.
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*/
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struct dfl_feature {
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u64 id;
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int resource_index;
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void __iomem *ioaddr;
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const struct dfl_feature_ops *ops;
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void *priv;
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};
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#define DEV_STATUS_IN_USE 0
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