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kvm: svm: Add IA32_FLUSH_CMD guest support
Expose IA32_FLUSH_CMD to the guest if the guest CPUID enumerates support for this MSR. As with IA32_PRED_CMD, permission for unintercepted writes to this MSR will be granted to the guest after the first non-zero write. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20230201132905.549148-3-eesposit@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -2869,6 +2869,28 @@ static int svm_set_vm_cr(struct kvm_vcpu *vcpu, u64 data)
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return 0;
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}
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static int svm_set_msr_ia32_cmd(struct kvm_vcpu *vcpu, struct msr_data *msr,
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bool guest_has_feat, u64 cmd,
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int x86_feature_bit)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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if (!msr->host_initiated && !guest_has_feat)
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return 1;
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if (!(msr->data & ~cmd))
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return 1;
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if (!boot_cpu_has(x86_feature_bit))
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return 1;
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if (!msr->data)
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return 0;
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wrmsrl(msr->index, cmd);
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set_msr_interception(vcpu, svm->msrpm, msr->index, 0, 1);
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return 0;
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}
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static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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@ -2943,19 +2965,14 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SPEC_CTRL, 1, 1);
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break;
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case MSR_IA32_PRED_CMD:
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if (!msr->host_initiated &&
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!guest_has_pred_cmd_msr(vcpu))
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return 1;
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if (data & ~PRED_CMD_IBPB)
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return 1;
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if (!boot_cpu_has(X86_FEATURE_IBPB))
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return 1;
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if (!data)
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break;
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wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PRED_CMD, 0, 1);
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r = svm_set_msr_ia32_cmd(vcpu, msr,
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guest_has_pred_cmd_msr(vcpu),
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PRED_CMD_IBPB, X86_FEATURE_IBPB);
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break;
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case MSR_IA32_FLUSH_CMD:
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r = svm_set_msr_ia32_cmd(vcpu, msr,
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guest_cpuid_has(vcpu, X86_FEATURE_FLUSH_L1D),
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L1D_FLUSH, X86_FEATURE_FLUSH_L1D);
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break;
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case MSR_AMD64_VIRT_SPEC_CTRL:
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if (!msr->host_initiated &&
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