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drm/amdgpu: Restrict extended wait to PSP v13.0.6
[ Upstream commit6fce23a4d8
] Only PSPv13.0.6 SOCs take a longer time to reach steady state. Other PSPv13 based SOCs don't need extended wait. Also, reduce PSPv13.0.6 wait time. Cc: stable@vger.kernel.org Fixes:fc59889071
("drm/amdgpu: update retry times for psp vmbx wait") Fixes:d8c1925ba8
("drm/amdgpu: update retry times for psp BL wait") Link: https://lore.kernel.org/amd-gfx/34dd4c66-f7bf-44aa-af8f-c82889dd652c@amd.com/ Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -60,7 +60,7 @@ MODULE_FIRMWARE("amdgpu/psp_14_0_0_ta.bin");
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#define GFX_CMD_USB_PD_USE_LFB 0x480
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/* Retry times for vmbx ready wait */
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#define PSP_VMBX_POLLING_LIMIT 20000
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#define PSP_VMBX_POLLING_LIMIT 3000
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/* VBIOS gfl defines */
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#define MBOX_READY_MASK 0x80000000
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@ -161,14 +161,18 @@ static int psp_v13_0_wait_for_vmbx_ready(struct psp_context *psp)
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static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)
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{
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struct amdgpu_device *adev = psp->adev;
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int retry_loop, ret;
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int retry_loop, retry_cnt, ret;
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retry_cnt =
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(adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 6)) ?
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PSP_VMBX_POLLING_LIMIT :
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10;
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/* Wait for bootloader to signify that it is ready having bit 31 of
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* C2PMSG_35 set to 1. All other bits are expected to be cleared.
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* If there is an error in processing command, bits[7:0] will be set.
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* This is applicable for PSP v13.0.6 and newer.
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*/
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for (retry_loop = 0; retry_loop < PSP_VMBX_POLLING_LIMIT; retry_loop++) {
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for (retry_loop = 0; retry_loop < retry_cnt; retry_loop++) {
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ret = psp_wait_for(
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psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
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0x80000000, 0xffffffff, false);
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