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Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410 ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410 ARM: S3C64XX: Reduce output of s3c64xx_dma_init1() ARM: S3C64XX: Tone down SDHCI debugging ARM: S3C64XX: Add clock for i2c1 ARM: S3C64XX: Staticise non-exported GPIO to interrupt functions ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devices ARM: S3C64XX: Fix keypad setup to configure correct number of rows ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02 ARM: S5P64X0: Fix number of GPIO lines in Bank F ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02
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commit
715695cac5
@ -99,6 +99,7 @@ config MACH_NEO1973_GTA02
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select POWER_SUPPLY
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select MACH_NEO1973
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select S3C2410_PWM
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select S3C_DEV_USB_HOST
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help
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Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
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@ -44,19 +44,19 @@
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#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */
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#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */
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#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */
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#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2
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#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */
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#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */
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#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4
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#define GTA02_GPIO_3D_RESET S3C2440_GPJ5
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#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */
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#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7
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#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8
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#define GTA02_GPIO_KEEPACT S3C2440_GPJ8
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#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10
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#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */
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#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */
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#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */
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#define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2)
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#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */
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#define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */
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#define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4)
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#define GTA02_GPIO_3D_RESET S3C2410_GPJ(5)
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#define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */
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#define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7)
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#define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8)
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#define GTA02_GPIO_KEEPACT S3C2410_GPJ(8)
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#define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10)
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#define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */
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#define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */
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#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
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#define GTA02_IRQ_MODEM IRQ_EINT1
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@ -150,6 +150,12 @@ static struct clk init_clocks_off[] = {
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C_CLKCON_PCLK_IIC,
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}, {
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.name = "i2c",
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.id = 1,
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.parent = &clk_p,
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.enable = s3c64xx_pclk_ctrl,
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.ctrlbit = S3C6410_CLKCON_PCLK_I2C1,
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}, {
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.name = "iis",
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.id = 0,
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@ -690,12 +690,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
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regptr = regs + PL080_Cx_BASE(0);
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for (ch = 0; ch < 8; ch++, chno++, chptr++) {
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printk(KERN_INFO "%s: registering DMA %d (%p)\n",
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__func__, chno, regptr);
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for (ch = 0; ch < 8; ch++, chptr++) {
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pr_debug("%s: registering DMA %d (%p)\n",
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__func__, chno + ch, regptr);
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chptr->bit = 1 << ch;
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chptr->number = chno;
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chptr->number = chno + ch;
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chptr->dmac = dmac;
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chptr->regs = regptr;
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regptr += PL080_Cx_STRIDE;
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@ -704,7 +704,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
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/* for the moment, permanently enable the controller */
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writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG);
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printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs);
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printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n",
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irq, regs, chno, chno+8);
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return 0;
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@ -72,7 +72,7 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
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.get_pull = s3c_gpio_getpull_updown,
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};
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int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
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static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
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{
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return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
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}
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@ -138,7 +138,7 @@ static struct s3c_gpio_chip gpio_4bit[] = {
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},
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};
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int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
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static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
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{
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return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
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}
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@ -28,6 +28,7 @@
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#include <linux/delay.h>
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#include <linux/smsc911x.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#ifdef CONFIG_SMDK6410_WM1190_EV1
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#include <linux/mfd/wm8350/core.h>
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@ -351,7 +352,7 @@ static struct regulator_init_data smdk6410_vddpll = {
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/* VDD_UH_MMC, LDO5 on J5 */
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static struct regulator_init_data smdk6410_vdduh_mmc = {
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.constraints = {
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.name = "PVDD_UH/PVDD_MMC",
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.name = "PVDD_UH+PVDD_MMC",
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.always_on = 1,
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},
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};
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@ -417,7 +418,7 @@ static struct regulator_init_data smdk6410_vddaudio = {
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/* S3C64xx internal logic & PLL */
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static struct regulator_init_data wm8350_dcdc1_data = {
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.constraints = {
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.name = "PVDD_INT/PVDD_PLL",
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.name = "PVDD_INT+PVDD_PLL",
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.min_uV = 1200000,
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.max_uV = 1200000,
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.always_on = 1,
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@ -452,7 +453,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
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static struct regulator_init_data wm8350_dcdc4_data = {
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.constraints = {
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.name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
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.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
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.min_uV = 3000000,
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.max_uV = 3000000,
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.always_on = 1,
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@ -464,7 +465,7 @@ static struct regulator_init_data wm8350_dcdc4_data = {
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/* OTGi/1190-EV1 HPVDD & AVDD */
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static struct regulator_init_data wm8350_ldo4_data = {
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.constraints = {
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.name = "PVDD_OTGI/HPVDD/AVDD",
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.name = "PVDD_OTGI+HPVDD+AVDD",
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.min_uV = 1200000,
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.max_uV = 1200000,
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.apply_uV = 1,
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@ -552,7 +553,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
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static struct regulator_init_data wm1192_dcdc3 = {
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.constraints = {
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.name = "PVDD_MEM/PVDD_GPS",
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.name = "PVDD_MEM+PVDD_GPS",
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.always_on = 1,
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},
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};
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@ -563,7 +564,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
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static struct regulator_init_data wm1192_ldo1 = {
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.constraints = {
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.name = "PVDD_LCD/PVDD_EXT",
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.name = "PVDD_LCD+PVDD_EXT",
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.always_on = 1,
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},
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.consumer_supplies = wm1192_ldo1_consumers,
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@ -17,7 +17,7 @@
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void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
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{
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/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
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s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
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s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3));
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/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
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s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
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@ -56,7 +56,7 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
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else
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ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
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printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
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pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
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writel(ctrl2, r + S3C_SDHCI_CONTROL2);
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writel(ctrl3, r + S3C_SDHCI_CONTROL3);
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}
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@ -23,7 +23,7 @@
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#define S5P6440_GPIO_A_NR (6)
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#define S5P6440_GPIO_B_NR (7)
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#define S5P6440_GPIO_C_NR (8)
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#define S5P6440_GPIO_F_NR (2)
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#define S5P6440_GPIO_F_NR (16)
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#define S5P6440_GPIO_G_NR (7)
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#define S5P6440_GPIO_H_NR (10)
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#define S5P6440_GPIO_I_NR (16)
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@ -36,7 +36,7 @@
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#define S5P6450_GPIO_B_NR (7)
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#define S5P6450_GPIO_C_NR (8)
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#define S5P6450_GPIO_D_NR (8)
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#define S5P6450_GPIO_F_NR (2)
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#define S5P6450_GPIO_F_NR (16)
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#define S5P6450_GPIO_G_NR (14)
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#define S5P6450_GPIO_H_NR (10)
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#define S5P6450_GPIO_I_NR (16)
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@ -15,6 +15,8 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <plat/devs.h>
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/* uart devices */
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static struct platform_device s3c24xx_uart_device0 = {
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