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ASoC: wm8995: replace codec to component
Now we can replace Codec to Component. Let's do it. Note: xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 1 -> .idle_bias_on = 0 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kuninori Morimoto
Mark Brown
parent
7928b2cbe5
commit
708ebb3beb
@ -385,7 +385,7 @@ struct wm8995_priv {
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struct fll_config fll[2], fll_suspend[2];
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struct regulator_bulk_data supplies[WM8995_NUM_SUPPLIES];
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struct notifier_block disable_nb[WM8995_NUM_SUPPLIES];
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struct snd_soc_codec *codec;
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struct snd_soc_component *component;
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};
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/*
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@ -485,48 +485,48 @@ static const struct snd_kcontrol_new wm8995_snd_controls[] = {
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WM8995_AIF2_ADC_RIGHT_VOLUME, 0, 96, 0, digital_tlv)
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};
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static void wm8995_update_class_w(struct snd_soc_codec *codec)
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static void wm8995_update_class_w(struct snd_soc_component *component)
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{
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int enable = 1;
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int source = 0; /* GCC flow analysis can't track enable */
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int reg, reg_r;
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/* We also need the same setting for L/R and only one path */
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reg = snd_soc_read(codec, WM8995_DAC1_LEFT_MIXER_ROUTING);
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reg = snd_soc_component_read32(component, WM8995_DAC1_LEFT_MIXER_ROUTING);
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switch (reg) {
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case WM8995_AIF2DACL_TO_DAC1L:
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dev_dbg(codec->dev, "Class W source AIF2DAC\n");
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dev_dbg(component->dev, "Class W source AIF2DAC\n");
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source = 2 << WM8995_CP_DYN_SRC_SEL_SHIFT;
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break;
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case WM8995_AIF1DAC2L_TO_DAC1L:
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dev_dbg(codec->dev, "Class W source AIF1DAC2\n");
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dev_dbg(component->dev, "Class W source AIF1DAC2\n");
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source = 1 << WM8995_CP_DYN_SRC_SEL_SHIFT;
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break;
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case WM8995_AIF1DAC1L_TO_DAC1L:
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dev_dbg(codec->dev, "Class W source AIF1DAC1\n");
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dev_dbg(component->dev, "Class W source AIF1DAC1\n");
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source = 0 << WM8995_CP_DYN_SRC_SEL_SHIFT;
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break;
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default:
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dev_dbg(codec->dev, "DAC mixer setting: %x\n", reg);
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dev_dbg(component->dev, "DAC mixer setting: %x\n", reg);
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enable = 0;
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break;
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}
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reg_r = snd_soc_read(codec, WM8995_DAC1_RIGHT_MIXER_ROUTING);
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reg_r = snd_soc_component_read32(component, WM8995_DAC1_RIGHT_MIXER_ROUTING);
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if (reg_r != reg) {
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dev_dbg(codec->dev, "Left and right DAC mixers different\n");
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dev_dbg(component->dev, "Left and right DAC mixers different\n");
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enable = 0;
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}
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if (enable) {
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dev_dbg(codec->dev, "Class W enabled\n");
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snd_soc_update_bits(codec, WM8995_CLASS_W_1,
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dev_dbg(component->dev, "Class W enabled\n");
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snd_soc_component_update_bits(component, WM8995_CLASS_W_1,
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WM8995_CP_DYN_PWR_MASK |
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WM8995_CP_DYN_SRC_SEL_MASK,
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source | WM8995_CP_DYN_PWR);
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} else {
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dev_dbg(codec->dev, "Class W disabled\n");
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snd_soc_update_bits(codec, WM8995_CLASS_W_1,
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dev_dbg(component->dev, "Class W disabled\n");
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snd_soc_component_update_bits(component, WM8995_CLASS_W_1,
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WM8995_CP_DYN_PWR_MASK, 0);
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}
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}
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@ -534,11 +534,11 @@ static void wm8995_update_class_w(struct snd_soc_codec *codec)
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static int check_clk_sys(struct snd_soc_dapm_widget *source,
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struct snd_soc_dapm_widget *sink)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
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struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
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unsigned int reg;
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const char *clk;
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reg = snd_soc_read(codec, WM8995_CLOCKING_1);
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reg = snd_soc_component_read32(component, WM8995_CLOCKING_1);
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/* Check what we're currently using for CLK_SYS */
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if (reg & WM8995_SYSCLK_SRC)
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clk = "AIF2CLK";
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@ -550,37 +550,37 @@ static int check_clk_sys(struct snd_soc_dapm_widget *source,
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static int wm8995_put_class_w(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
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struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
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int ret;
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ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
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wm8995_update_class_w(codec);
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wm8995_update_class_w(component);
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return ret;
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}
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static int hp_supply_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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/* Enable the headphone amp */
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snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
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WM8995_HPOUT1L_ENA_MASK |
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WM8995_HPOUT1R_ENA_MASK,
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WM8995_HPOUT1L_ENA |
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WM8995_HPOUT1R_ENA);
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/* Enable the second stage */
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snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1,
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snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
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WM8995_HPOUT1L_DLY_MASK |
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WM8995_HPOUT1R_DLY_MASK,
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WM8995_HPOUT1L_DLY |
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WM8995_HPOUT1R_DLY);
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break;
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1,
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snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1,
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WM8995_CP_ENA_MASK, 0);
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break;
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}
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@ -588,41 +588,41 @@ static int hp_supply_event(struct snd_soc_dapm_widget *w,
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return 0;
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}
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static void dc_servo_cmd(struct snd_soc_codec *codec,
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static void dc_servo_cmd(struct snd_soc_component *component,
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unsigned int reg, unsigned int val, unsigned int mask)
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{
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int timeout = 10;
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dev_dbg(codec->dev, "%s: reg = %#x, val = %#x, mask = %#x\n",
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dev_dbg(component->dev, "%s: reg = %#x, val = %#x, mask = %#x\n",
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__func__, reg, val, mask);
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snd_soc_write(codec, reg, val);
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snd_soc_component_write(component, reg, val);
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while (timeout--) {
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msleep(10);
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val = snd_soc_read(codec, WM8995_DC_SERVO_READBACK_0);
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val = snd_soc_component_read32(component, WM8995_DC_SERVO_READBACK_0);
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if ((val & mask) == mask)
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return;
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}
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dev_err(codec->dev, "Timed out waiting for DC Servo\n");
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dev_err(component->dev, "Timed out waiting for DC Servo\n");
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}
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static int hp_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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unsigned int reg;
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reg = snd_soc_read(codec, WM8995_ANALOGUE_HP_1);
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reg = snd_soc_component_read32(component, WM8995_ANALOGUE_HP_1);
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1,
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snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1,
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WM8995_CP_ENA_MASK, WM8995_CP_ENA);
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msleep(5);
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snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
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WM8995_HPOUT1L_ENA_MASK |
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WM8995_HPOUT1R_ENA_MASK,
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WM8995_HPOUT1L_ENA | WM8995_HPOUT1R_ENA);
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@ -630,12 +630,12 @@ static int hp_event(struct snd_soc_dapm_widget *w,
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udelay(20);
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reg |= WM8995_HPOUT1L_DLY | WM8995_HPOUT1R_DLY;
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snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg);
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snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg);
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snd_soc_write(codec, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 |
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snd_soc_component_write(component, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 |
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WM8995_DCS_ENA_CHAN_1);
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dc_servo_cmd(codec, WM8995_DC_SERVO_2,
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dc_servo_cmd(component, WM8995_DC_SERVO_2,
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WM8995_DCS_TRIG_STARTUP_0 |
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WM8995_DCS_TRIG_STARTUP_1,
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WM8995_DCS_TRIG_DAC_WR_0 |
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@ -643,23 +643,23 @@ static int hp_event(struct snd_soc_dapm_widget *w,
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reg |= WM8995_HPOUT1R_OUTP | WM8995_HPOUT1R_RMV_SHORT |
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WM8995_HPOUT1L_OUTP | WM8995_HPOUT1L_RMV_SHORT;
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snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg);
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snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg);
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break;
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1,
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snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
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WM8995_HPOUT1L_OUTP_MASK |
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WM8995_HPOUT1R_OUTP_MASK |
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WM8995_HPOUT1L_RMV_SHORT_MASK |
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WM8995_HPOUT1R_RMV_SHORT_MASK, 0);
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snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1,
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snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
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WM8995_HPOUT1L_DLY_MASK |
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WM8995_HPOUT1R_DLY_MASK, 0);
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snd_soc_write(codec, WM8995_DC_SERVO_1, 0);
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snd_soc_component_write(component, WM8995_DC_SERVO_1, 0);
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snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1,
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snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
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WM8995_HPOUT1L_ENA_MASK |
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WM8995_HPOUT1R_ENA_MASK,
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0);
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@ -669,14 +669,14 @@ static int hp_event(struct snd_soc_dapm_widget *w,
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return 0;
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}
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static int configure_aif_clock(struct snd_soc_codec *codec, int aif)
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static int configure_aif_clock(struct snd_soc_component *component, int aif)
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{
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struct wm8995_priv *wm8995;
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int rate;
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int reg1 = 0;
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int offset;
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wm8995 = snd_soc_codec_get_drvdata(codec);
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wm8995 = snd_soc_component_get_drvdata(component);
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if (aif)
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offset = 4;
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@ -707,29 +707,29 @@ static int configure_aif_clock(struct snd_soc_codec *codec, int aif)
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rate /= 2;
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reg1 |= WM8995_AIF1CLK_DIV;
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dev_dbg(codec->dev, "Dividing AIF%d clock to %dHz\n",
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dev_dbg(component->dev, "Dividing AIF%d clock to %dHz\n",
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aif + 1, rate);
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}
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wm8995->aifclk[aif] = rate;
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snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1 + offset,
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snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1 + offset,
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WM8995_AIF1CLK_SRC_MASK | WM8995_AIF1CLK_DIV_MASK,
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reg1);
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return 0;
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}
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static int configure_clock(struct snd_soc_codec *codec)
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static int configure_clock(struct snd_soc_component *component)
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{
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struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
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struct wm8995_priv *wm8995;
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int change, new;
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wm8995 = snd_soc_codec_get_drvdata(codec);
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wm8995 = snd_soc_component_get_drvdata(component);
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/* Bring up the AIF clocks first */
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configure_aif_clock(codec, 0);
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configure_aif_clock(codec, 1);
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configure_aif_clock(component, 0);
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configure_aif_clock(component, 1);
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/*
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* Then switch CLK_SYS over to the higher of them; a change
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@ -747,7 +747,7 @@ static int configure_clock(struct snd_soc_codec *codec)
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else
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new = 0;
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change = snd_soc_update_bits(codec, WM8995_CLOCKING_1,
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change = snd_soc_component_update_bits(component, WM8995_CLOCKING_1,
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WM8995_SYSCLK_SRC_MASK, new);
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if (!change)
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return 0;
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@ -760,14 +760,14 @@ static int configure_clock(struct snd_soc_codec *codec)
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static int clk_sys_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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return configure_clock(codec);
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return configure_clock(component);
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case SND_SOC_DAPM_POST_PMD:
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configure_clock(codec);
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configure_clock(component);
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break;
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}
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@ -1422,7 +1422,7 @@ static bool wm8995_volatile(struct device *dev, unsigned int reg)
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static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct snd_soc_component *component = dai->component;
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int mute_reg;
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switch (dai->id) {
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@ -1436,18 +1436,18 @@ static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute)
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return -EINVAL;
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}
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snd_soc_update_bits(codec, mute_reg, WM8995_AIF1DAC1_MUTE_MASK,
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snd_soc_component_update_bits(component, mute_reg, WM8995_AIF1DAC1_MUTE_MASK,
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!!mute << WM8995_AIF1DAC1_MUTE_SHIFT);
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return 0;
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}
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static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec;
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struct snd_soc_component *component;
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int master;
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int aif;
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codec = dai->codec;
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component = dai->component;
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master = 0;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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@ -1519,11 +1519,11 @@ static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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return -EINVAL;
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}
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snd_soc_update_bits(codec, WM8995_AIF1_CONTROL_1,
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snd_soc_component_update_bits(component, WM8995_AIF1_CONTROL_1,
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WM8995_AIF1_BCLK_INV_MASK |
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WM8995_AIF1_LRCLK_INV_MASK |
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WM8995_AIF1_FMT_MASK, aif);
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snd_soc_update_bits(codec, WM8995_AIF1_MASTER_SLAVE,
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snd_soc_component_update_bits(component, WM8995_AIF1_MASTER_SLAVE,
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WM8995_AIF1_MSTR_MASK, master);
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return 0;
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}
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@ -1546,7 +1546,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec;
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struct snd_soc_component *component;
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struct wm8995_priv *wm8995;
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int aif1_reg;
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int bclk_reg;
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@ -1557,8 +1557,8 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
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int lrclk, bclk;
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int i, rate_val, best, best_val, cur_val;
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codec = dai->codec;
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wm8995 = snd_soc_codec_get_drvdata(codec);
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component = dai->component;
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wm8995 = snd_soc_component_get_drvdata(component);
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switch (dai->id) {
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case 0:
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@ -1570,7 +1570,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
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lrclk_reg = WM8995_AIF1DAC_LRCLK;
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} else {
|
||||
lrclk_reg = WM8995_AIF1ADC_LRCLK;
|
||||
dev_dbg(codec->dev, "AIF1 using split LRCLK\n");
|
||||
dev_dbg(component->dev, "AIF1 using split LRCLK\n");
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
@ -1582,7 +1582,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
|
||||
lrclk_reg = WM8995_AIF2DAC_LRCLK;
|
||||
} else {
|
||||
lrclk_reg = WM8995_AIF2ADC_LRCLK;
|
||||
dev_dbg(codec->dev, "AIF2 using split LRCLK\n");
|
||||
dev_dbg(component->dev, "AIF2 using split LRCLK\n");
|
||||
}
|
||||
break;
|
||||
default:
|
||||
@ -1668,13 +1668,13 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
|
||||
dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n",
|
||||
lrclk, bclk_rate / lrclk);
|
||||
|
||||
snd_soc_update_bits(codec, aif1_reg,
|
||||
snd_soc_component_update_bits(component, aif1_reg,
|
||||
WM8995_AIF1_WL_MASK, aif1);
|
||||
snd_soc_update_bits(codec, bclk_reg,
|
||||
snd_soc_component_update_bits(component, bclk_reg,
|
||||
WM8995_AIF1_BCLK_DIV_MASK, bclk);
|
||||
snd_soc_update_bits(codec, lrclk_reg,
|
||||
snd_soc_component_update_bits(component, lrclk_reg,
|
||||
WM8995_AIF1DAC_RATE_MASK, lrclk);
|
||||
snd_soc_update_bits(codec, rate_reg,
|
||||
snd_soc_component_update_bits(component, rate_reg,
|
||||
WM8995_AIF1_SR_MASK |
|
||||
WM8995_AIF1CLK_RATE_MASK, rate_val);
|
||||
return 0;
|
||||
@ -1682,7 +1682,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream,
|
||||
|
||||
static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
int reg, val, mask;
|
||||
|
||||
switch (codec_dai->id) {
|
||||
@ -1707,7 +1707,7 @@ static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate)
|
||||
else
|
||||
val = 0;
|
||||
|
||||
return snd_soc_update_bits(codec, reg, mask, val);
|
||||
return snd_soc_component_update_bits(component, reg, mask, val);
|
||||
}
|
||||
|
||||
/* The size in bits of the FLL divide multiplied by 10
|
||||
@ -1797,19 +1797,19 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id,
|
||||
int src, unsigned int freq_in,
|
||||
unsigned int freq_out)
|
||||
{
|
||||
struct snd_soc_codec *codec;
|
||||
struct snd_soc_component *component;
|
||||
struct wm8995_priv *wm8995;
|
||||
int reg_offset, ret;
|
||||
struct fll_div fll;
|
||||
u16 reg, aif1, aif2;
|
||||
|
||||
codec = dai->codec;
|
||||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
component = dai->component;
|
||||
wm8995 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
aif1 = snd_soc_read(codec, WM8995_AIF1_CLOCKING_1)
|
||||
aif1 = snd_soc_component_read32(component, WM8995_AIF1_CLOCKING_1)
|
||||
& WM8995_AIF1CLK_ENA;
|
||||
|
||||
aif2 = snd_soc_read(codec, WM8995_AIF2_CLOCKING_1)
|
||||
aif2 = snd_soc_component_read32(component, WM8995_AIF2_CLOCKING_1)
|
||||
& WM8995_AIF2CLK_ENA;
|
||||
|
||||
switch (id) {
|
||||
@ -1858,35 +1858,35 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id,
|
||||
return ret;
|
||||
|
||||
/* Gate the AIF clocks while we reclock */
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1,
|
||||
WM8995_AIF1CLK_ENA_MASK, 0);
|
||||
snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF2_CLOCKING_1,
|
||||
WM8995_AIF2CLK_ENA_MASK, 0);
|
||||
|
||||
/* We always need to disable the FLL while reconfiguring */
|
||||
snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset,
|
||||
snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset,
|
||||
WM8995_FLL1_ENA_MASK, 0);
|
||||
|
||||
reg = (fll.outdiv << WM8995_FLL1_OUTDIV_SHIFT) |
|
||||
(fll.fll_fratio << WM8995_FLL1_FRATIO_SHIFT);
|
||||
snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_2 + reg_offset,
|
||||
snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_2 + reg_offset,
|
||||
WM8995_FLL1_OUTDIV_MASK |
|
||||
WM8995_FLL1_FRATIO_MASK, reg);
|
||||
|
||||
snd_soc_write(codec, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k);
|
||||
snd_soc_component_write(component, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k);
|
||||
|
||||
snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_4 + reg_offset,
|
||||
snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_4 + reg_offset,
|
||||
WM8995_FLL1_N_MASK,
|
||||
fll.n << WM8995_FLL1_N_SHIFT);
|
||||
|
||||
snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_5 + reg_offset,
|
||||
snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_5 + reg_offset,
|
||||
WM8995_FLL1_REFCLK_DIV_MASK |
|
||||
WM8995_FLL1_REFCLK_SRC_MASK,
|
||||
(fll.clk_ref_div << WM8995_FLL1_REFCLK_DIV_SHIFT) |
|
||||
(src - 1));
|
||||
|
||||
if (freq_out)
|
||||
snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset,
|
||||
snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset,
|
||||
WM8995_FLL1_ENA_MASK, WM8995_FLL1_ENA);
|
||||
|
||||
wm8995->fll[id].in = freq_in;
|
||||
@ -1894,12 +1894,12 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id,
|
||||
wm8995->fll[id].src = src;
|
||||
|
||||
/* Enable any gated AIF clocks */
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1,
|
||||
WM8995_AIF1CLK_ENA_MASK, aif1);
|
||||
snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF2_CLOCKING_1,
|
||||
WM8995_AIF2CLK_ENA_MASK, aif2);
|
||||
|
||||
configure_clock(codec);
|
||||
configure_clock(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1907,11 +1907,11 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id,
|
||||
static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai,
|
||||
int clk_id, unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec;
|
||||
struct snd_soc_component *component;
|
||||
struct wm8995_priv *wm8995;
|
||||
|
||||
codec = dai->codec;
|
||||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
component = dai->component;
|
||||
wm8995 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (dai->id) {
|
||||
case 0:
|
||||
@ -1949,24 +1949,24 @@ static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
configure_clock(codec);
|
||||
configure_clock(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8995_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8995_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
struct wm8995_priv *wm8995;
|
||||
int ret;
|
||||
|
||||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8995 = snd_soc_component_get_drvdata(component);
|
||||
switch (level) {
|
||||
case SND_SOC_BIAS_ON:
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
break;
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies),
|
||||
wm8995->supplies);
|
||||
if (ret)
|
||||
@ -1974,17 +1974,17 @@ static int wm8995_set_bias_level(struct snd_soc_codec *codec,
|
||||
|
||||
ret = regcache_sync(wm8995->regmap);
|
||||
if (ret) {
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to sync cache: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
|
||||
WM8995_BG_ENA_MASK, WM8995_BG_ENA);
|
||||
}
|
||||
break;
|
||||
case SND_SOC_BIAS_OFF:
|
||||
snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
|
||||
WM8995_BG_ENA_MASK, 0);
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8995->supplies),
|
||||
wm8995->supplies);
|
||||
@ -1994,37 +1994,36 @@ static int wm8995_set_bias_level(struct snd_soc_codec *codec,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8995_remove(struct snd_soc_codec *codec)
|
||||
static void wm8995_remove(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8995_priv *wm8995;
|
||||
int i;
|
||||
|
||||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8995 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8995->supplies); ++i)
|
||||
regulator_unregister_notifier(wm8995->supplies[i].consumer,
|
||||
&wm8995->disable_nb[i]);
|
||||
|
||||
regulator_bulk_free(ARRAY_SIZE(wm8995->supplies), wm8995->supplies);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8995_probe(struct snd_soc_codec *codec)
|
||||
static int wm8995_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8995_priv *wm8995;
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8995->codec = codec;
|
||||
wm8995 = snd_soc_component_get_drvdata(component);
|
||||
wm8995->component = component;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++)
|
||||
wm8995->supplies[i].supply = wm8995_supply_names[i];
|
||||
|
||||
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8995->supplies),
|
||||
ret = regulator_bulk_get(component->dev, ARRAY_SIZE(wm8995->supplies),
|
||||
wm8995->supplies);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -2042,7 +2041,7 @@ static int wm8995_probe(struct snd_soc_codec *codec)
|
||||
ret = regulator_register_notifier(wm8995->supplies[i].consumer,
|
||||
&wm8995->disable_nb[i]);
|
||||
if (ret) {
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to register regulator notifier: %d\n",
|
||||
ret);
|
||||
}
|
||||
@ -2051,49 +2050,49 @@ static int wm8995_probe(struct snd_soc_codec *codec)
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies),
|
||||
wm8995->supplies);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
|
||||
goto err_reg_get;
|
||||
}
|
||||
|
||||
ret = snd_soc_read(codec, WM8995_SOFTWARE_RESET);
|
||||
ret = snd_soc_component_read32(component, WM8995_SOFTWARE_RESET);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to read device ID: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to read device ID: %d\n", ret);
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
if (ret != 0x8995) {
|
||||
dev_err(codec->dev, "Invalid device ID: %#x\n", ret);
|
||||
dev_err(component->dev, "Invalid device ID: %#x\n", ret);
|
||||
ret = -EINVAL;
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
ret = snd_soc_write(codec, WM8995_SOFTWARE_RESET, 0);
|
||||
ret = snd_soc_component_write(component, WM8995_SOFTWARE_RESET, 0);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to issue reset: %d\n", ret);
|
||||
goto err_reg_enable;
|
||||
}
|
||||
|
||||
/* Latch volume updates (right only; we always do left then right). */
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_DAC1_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_DAC1_RIGHT_VOLUME,
|
||||
WM8995_AIF1DAC1_VU_MASK, WM8995_AIF1DAC1_VU);
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_DAC2_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_DAC2_RIGHT_VOLUME,
|
||||
WM8995_AIF1DAC2_VU_MASK, WM8995_AIF1DAC2_VU);
|
||||
snd_soc_update_bits(codec, WM8995_AIF2_DAC_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF2_DAC_RIGHT_VOLUME,
|
||||
WM8995_AIF2DAC_VU_MASK, WM8995_AIF2DAC_VU);
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_ADC1_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_ADC1_RIGHT_VOLUME,
|
||||
WM8995_AIF1ADC1_VU_MASK, WM8995_AIF1ADC1_VU);
|
||||
snd_soc_update_bits(codec, WM8995_AIF1_ADC2_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF1_ADC2_RIGHT_VOLUME,
|
||||
WM8995_AIF1ADC2_VU_MASK, WM8995_AIF1ADC2_VU);
|
||||
snd_soc_update_bits(codec, WM8995_AIF2_ADC_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_AIF2_ADC_RIGHT_VOLUME,
|
||||
WM8995_AIF2ADC_VU_MASK, WM8995_AIF1ADC2_VU);
|
||||
snd_soc_update_bits(codec, WM8995_DAC1_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_DAC1_RIGHT_VOLUME,
|
||||
WM8995_DAC1_VU_MASK, WM8995_DAC1_VU);
|
||||
snd_soc_update_bits(codec, WM8995_DAC2_RIGHT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_DAC2_RIGHT_VOLUME,
|
||||
WM8995_DAC2_VU_MASK, WM8995_DAC2_VU);
|
||||
snd_soc_update_bits(codec, WM8995_RIGHT_LINE_INPUT_1_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8995_RIGHT_LINE_INPUT_1_VOLUME,
|
||||
WM8995_IN1_VU_MASK, WM8995_IN1_VU);
|
||||
|
||||
wm8995_update_class_w(codec);
|
||||
wm8995_update_class_w(component);
|
||||
|
||||
return 0;
|
||||
|
||||
@ -2186,20 +2185,19 @@ static struct snd_soc_dai_driver wm8995_dai[] = {
|
||||
}
|
||||
};
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8995 = {
|
||||
.probe = wm8995_probe,
|
||||
.remove = wm8995_remove,
|
||||
.set_bias_level = wm8995_set_bias_level,
|
||||
.idle_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8995_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8995_snd_controls),
|
||||
.dapm_widgets = wm8995_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8995_dapm_widgets),
|
||||
.dapm_routes = wm8995_intercon,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8995_intercon),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8995 = {
|
||||
.probe = wm8995_probe,
|
||||
.remove = wm8995_remove,
|
||||
.set_bias_level = wm8995_set_bias_level,
|
||||
.controls = wm8995_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8995_snd_controls),
|
||||
.dapm_widgets = wm8995_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8995_dapm_widgets),
|
||||
.dapm_routes = wm8995_intercon,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8995_intercon),
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8995_regmap = {
|
||||
@ -2233,24 +2231,17 @@ static int wm8995_spi_probe(struct spi_device *spi)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_register_codec(&spi->dev,
|
||||
&soc_codec_dev_wm8995, wm8995_dai,
|
||||
ret = devm_snd_soc_register_component(&spi->dev,
|
||||
&soc_component_dev_wm8995, wm8995_dai,
|
||||
ARRAY_SIZE(wm8995_dai));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8995_spi_remove(struct spi_device *spi)
|
||||
{
|
||||
snd_soc_unregister_codec(&spi->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct spi_driver wm8995_spi_driver = {
|
||||
.driver = {
|
||||
.name = "wm8995",
|
||||
},
|
||||
.probe = wm8995_spi_probe,
|
||||
.remove = wm8995_spi_remove
|
||||
};
|
||||
#endif
|
||||
|
||||
@ -2274,8 +2265,8 @@ static int wm8995_i2c_probe(struct i2c_client *i2c,
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8995, wm8995_dai,
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8995, wm8995_dai,
|
||||
ARRAY_SIZE(wm8995_dai));
|
||||
if (ret < 0)
|
||||
dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
|
||||
@ -2283,12 +2274,6 @@ static int wm8995_i2c_probe(struct i2c_client *i2c,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8995_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8995_i2c_id[] = {
|
||||
{"wm8995", 0},
|
||||
{}
|
||||
@ -2301,7 +2286,6 @@ static struct i2c_driver wm8995_i2c_driver = {
|
||||
.name = "wm8995",
|
||||
},
|
||||
.probe = wm8995_i2c_probe,
|
||||
.remove = wm8995_i2c_remove,
|
||||
.id_table = wm8995_i2c_id
|
||||
};
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user