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KVM: x86: Add a capability to configure bus frequency for APIC timer
Add KVM_CAP_X86_APIC_BUS_CYCLES_NS capability to configure the APIC bus clock frequency for APIC timer emulation. Allow KVM_ENABLE_CAPABILITY(KVM_CAP_X86_APIC_BUS_CYCLES_NS) to set the frequency in nanoseconds. When using this capability, the user space VMM should configure CPUID leaf 0x15 to advertise the frequency. Vishal reported that the TDX guest kernel expects a 25MHz APIC bus frequency but ends up getting interrupts at a significantly higher rate. The TDX architecture hard-codes the core crystal clock frequency to 25MHz and mandates exposing it via CPUID leaf 0x15. The TDX architecture does not allow the VMM to override the value. In addition, per Intel SDM: "The APIC timer frequency will be the processor’s bus clock or core crystal clock frequency (when TSC/core crystal clock ratio is enumerated in CPUID leaf 0x15) divided by the value specified in the divide configuration register." The resulting 25MHz APIC bus frequency conflicts with the KVM hardcoded APIC bus frequency of 1GHz. The KVM doesn't enumerate CPUID leaf 0x15 to the guest unless the user space VMM sets it using KVM_SET_CPUID. If the CPUID leaf 0x15 is enumerated, the guest kernel uses it as the APIC bus frequency. If not, the guest kernel measures the frequency based on other known timers like the ACPI timer or the legacy PIT. As reported by Vishal the TDX guest kernel expects a 25MHz timer frequency but gets timer interrupt more frequently due to the 1GHz frequency used by KVM. To ensure that the guest doesn't have a conflicting view of the APIC bus frequency, allow the userspace to tell KVM to use the same frequency that TDX mandates instead of the default 1Ghz. Reported-by: Vishal Annapurve <vannapurve@google.com> Closes: https://lore.kernel.org/lkml/20231006011255.4163884-1-vannapurve@google.com Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com> Co-developed-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Yuan Yao <yuan.yao@intel.com> Link: https://lore.kernel.org/r/6748a4c12269e756f0c48680da8ccc5367c31ce7.1714081726.git.reinette.chatre@intel.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -8070,6 +8070,23 @@ error/annotated fault.
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See KVM_EXIT_MEMORY_FAULT for more information.
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7.35 KVM_CAP_X86_APIC_BUS_CYCLES_NS
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-----------------------------------
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:Architectures: x86
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:Target: VM
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:Parameters: args[0] is the desired APIC bus clock rate, in nanoseconds
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:Returns: 0 on success, -EINVAL if args[0] contains an invalid value for the
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frequency or if any vCPUs have been created, -ENXIO if a virtual
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local APIC has not been created using KVM_CREATE_IRQCHIP.
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This capability sets the VM's APIC bus clock frequency, used by KVM's in-kernel
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virtual APIC when emulating APIC timers. KVM's default value can be retrieved
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by KVM_CHECK_EXTENSION.
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Note: Userspace is responsible for correctly configuring CPUID 0x15, a.k.a. the
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core crystal clock frequency, if a non-zero CPUID 0x15 is exposed to the guest.
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8. Other capabilities.
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======================
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@ -4706,6 +4706,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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case KVM_CAP_MEMORY_FAULT_INFO:
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r = 1;
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break;
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case KVM_CAP_X86_APIC_BUS_CYCLES_NS:
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r = APIC_BUS_CYCLE_NS_DEFAULT;
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break;
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case KVM_CAP_EXIT_HYPERCALL:
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r = KVM_EXIT_HYPERCALL_VALID_MASK;
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break;
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@ -6746,6 +6749,30 @@ split_irqchip_unlock:
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}
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mutex_unlock(&kvm->lock);
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break;
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case KVM_CAP_X86_APIC_BUS_CYCLES_NS: {
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u64 bus_cycle_ns = cap->args[0];
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u64 unused;
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/*
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* Guard against overflow in tmict_to_ns(). 128 is the highest
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* divide value that can be programmed in APIC_TDCR.
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*/
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r = -EINVAL;
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if (!bus_cycle_ns ||
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check_mul_overflow((u64)U32_MAX * 128, bus_cycle_ns, &unused))
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break;
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r = 0;
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mutex_lock(&kvm->lock);
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if (!irqchip_in_kernel(kvm))
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r = -ENXIO;
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else if (kvm->created_vcpus)
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r = -EINVAL;
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else
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kvm->arch.apic_bus_cycle_ns = bus_cycle_ns;
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mutex_unlock(&kvm->lock);
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break;
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}
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default:
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r = -EINVAL;
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break;
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@ -917,6 +917,7 @@ struct kvm_enable_cap {
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#define KVM_CAP_MEMORY_ATTRIBUTES 233
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#define KVM_CAP_GUEST_MEMFD 234
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#define KVM_CAP_VM_TYPES 235
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#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 236
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struct kvm_irq_routing_irqchip {
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__u32 irqchip;
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