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ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnode
The current practice is to not group clocks under a "clocks" subnode, but just put them together with the other on-SoC devices. As per updates for R-Car Gen2 SoCs by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -30,62 +30,56 @@
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spi4 = &spi4;
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};
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clocks {
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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/* External clocks */
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extal_clk: extal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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};
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/* External clocks */
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extal_clk: extal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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};
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usb_x1_clk: usb_x1 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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};
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usb_x1_clk: usb_x1 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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};
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rtc_x1_clk: rtc_x1 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board to 32678 */
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clock-frequency = <0>;
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};
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rtc_x1_clk: rtc_x1 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board to 32678 */
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clock-frequency = <0>;
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};
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rtc_x3_clk: rtc_x3 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board to 4000000 */
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clock-frequency = <0>;
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};
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rtc_x3_clk: rtc_x3 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board to 4000000 */
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clock-frequency = <0>;
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};
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/* Fixed factor clocks */
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b_clk: b {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <3>;
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};
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p1_clk: p1 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <6>;
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};
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p0_clk: p0 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <12>;
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};
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/* Fixed factor clocks */
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b_clk: b {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <3>;
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};
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p1_clk: p1 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <6>;
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};
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p0_clk: p0 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <12>;
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};
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cpus {
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