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ARM: bcmring: update clock source registration

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In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants.  Switch over to using this new interface.

Acked-By: Scott Branden <sbranden@broadcom.com>
Acked-By: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2010-12-13 13:16:39 +00:00
parent 132b16325f
commit 6eda51192f
1 changed files with 4 additions and 10 deletions
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14
arch/arm/mach-bcmring/core.c
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@ -294,7 +294,6 @@ static struct clocksource clocksource_bcmring_timer1 = {
.rating = 200, .rating = 200,
.read = bcmring_get_cycles_timer1, .read = bcmring_get_cycles_timer1,
.mask = CLOCKSOURCE_MASK(32), .mask = CLOCKSOURCE_MASK(32),
.shift = 20,
.flags = CLOCK_SOURCE_IS_CONTINUOUS, .flags = CLOCK_SOURCE_IS_CONTINUOUS,
}; };
@ -303,7 +302,6 @@ static struct clocksource clocksource_bcmring_timer3 = {
.rating = 100, .rating = 100,
.read = bcmring_get_cycles_timer3, .read = bcmring_get_cycles_timer3,
.mask = CLOCKSOURCE_MASK(32), .mask = CLOCKSOURCE_MASK(32),
.shift = 20,
.flags = CLOCK_SOURCE_IS_CONTINUOUS, .flags = CLOCK_SOURCE_IS_CONTINUOUS,
}; };
@ -316,10 +314,8 @@ static int __init bcmring_clocksource_init(void)
writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
TIMER1_VA_BASE + TIMER_CTRL); TIMER1_VA_BASE + TIMER_CTRL);
clocksource_bcmring_timer1.mult = clocksource_register_khz(&clocksource_bcmring_timer1,
clocksource_khz2mult(TIMER1_FREQUENCY_MHZ * 1000, TIMER1_FREQUENCY_MHZ * 1000);
clocksource_bcmring_timer1.shift);
clocksource_register(&clocksource_bcmring_timer1);
/* setup timer3 as free-running clocksource */ /* setup timer3 as free-running clocksource */
writel(0, TIMER3_VA_BASE + TIMER_CTRL); writel(0, TIMER3_VA_BASE + TIMER_CTRL);
@ -328,10 +324,8 @@ static int __init bcmring_clocksource_init(void)
writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
TIMER3_VA_BASE + TIMER_CTRL); TIMER3_VA_BASE + TIMER_CTRL);
clocksource_bcmring_timer3.mult = clocksource_register_khz(&clocksource_bcmring_timer3,
clocksource_khz2mult(TIMER3_FREQUENCY_KHZ, TIMER3_FREQUENCY_KHZ);
clocksource_bcmring_timer3.shift);
clocksource_register(&clocksource_bcmring_timer3);
return 0; return 0;
} }