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ARM: bcmring: update clock source registration
In d7e81c2
(clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants. Switch over to using this new interface.
Acked-By: Scott Branden <sbranden@broadcom.com>
Acked-By: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
132b16325f
commit
6eda51192f
@ -294,7 +294,6 @@ static struct clocksource clocksource_bcmring_timer1 = {
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.rating = 200,
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.read = bcmring_get_cycles_timer1,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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@ -303,7 +302,6 @@ static struct clocksource clocksource_bcmring_timer3 = {
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.rating = 100,
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.read = bcmring_get_cycles_timer3,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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@ -316,10 +314,8 @@ static int __init bcmring_clocksource_init(void)
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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TIMER1_VA_BASE + TIMER_CTRL);
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clocksource_bcmring_timer1.mult =
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clocksource_khz2mult(TIMER1_FREQUENCY_MHZ * 1000,
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clocksource_bcmring_timer1.shift);
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clocksource_register(&clocksource_bcmring_timer1);
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clocksource_register_khz(&clocksource_bcmring_timer1,
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TIMER1_FREQUENCY_MHZ * 1000);
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/* setup timer3 as free-running clocksource */
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writel(0, TIMER3_VA_BASE + TIMER_CTRL);
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@ -328,10 +324,8 @@ static int __init bcmring_clocksource_init(void)
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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TIMER3_VA_BASE + TIMER_CTRL);
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clocksource_bcmring_timer3.mult =
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clocksource_khz2mult(TIMER3_FREQUENCY_KHZ,
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clocksource_bcmring_timer3.shift);
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clocksource_register(&clocksource_bcmring_timer3);
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clocksource_register_khz(&clocksource_bcmring_timer3,
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TIMER3_FREQUENCY_KHZ);
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return 0;
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}
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