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cpufreq: amd-pstate: Fix invalid write to MSR_AMD_CPPC_REQ
`amd_pstate_set_epp` function uses `cppc_req_cached` and `epp` variable to update the MSR_AMD_CPPC_REQ register for AMD MSR systems. The recent commit7cca9a9851
("cpufreq: amd-pstate: avoid uninitialized variable use") changed the sequence of updating cppc_req_cached and writing the MSR_AMD_CPPC_REQ. Therefore while switching from powersave to performance governor and vice-versa in active mode MSR_AMD_CPPC_REQ is set with the previous cached value. To fix this: first update the `cppc_req_cached` variable and then call `amd_pstate_set_epp` function. - Before commit7cca9a9851
("cpufreq: amd-pstate: avoid uninitialized variable use"): With powersave governor: [ 1.652743] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff [ 1.652744] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff [ 1.652746] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0 Changing to performance governor: [ 300.493842] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff [ 300.493846] amd_pstate_set_epp: writing cppc_req_cached = 0xffff [ 300.493847] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0 - After commit7cca9a9851
("cpufreq: amd-pstate: avoid uninitialized variable use"): With powersave governor: [ 1.646037] amd_pstate_set_epp: writing cppc_req_cached = 0xffff [ 1.646038] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0 [ 1.646042] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff Changing to performance governor: [ 687.117401] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff [ 687.117405] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0 [ 687.117419] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff - After this fix: With powersave governor: [ 2.525717] amd_pstate_epp_init: writing to cppc_req_cached = 0x1eff [ 2.525720] amd_pstate_set_epp: writing cppc_req_cached = 0x1eff [ 2.525722] amd_pstate_set_epp: writing min_perf = 30, des_perf = 0, max_perf = 255, epp = 0 Changing to performance governor: [ 3440.152468] amd_pstate_epp_init: writing to cppc_req_cached = 0xffff [ 3440.152473] amd_pstate_set_epp: writing cppc_req_cached = 0xffff [ 3440.152474] amd_pstate_set_epp: writing min_perf = 255, des_perf = 0, max_perf = 255, epp = 0 Fixes:7cca9a9851
("cpufreq: amd-pstate: avoid uninitialized variable use") Signed-off-by: Wyes Karny <wyes.karny@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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parent
f0f8e9e730
commit
6e9d12125f
@ -1057,27 +1057,28 @@ static void amd_pstate_epp_init(unsigned int cpu)
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cpudata->epp_policy = cpudata->policy;
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if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) {
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epp = amd_pstate_get_epp(cpudata, value);
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if (epp < 0)
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goto skip_epp;
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/* force the epp value to be zero for performance policy */
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epp = 0;
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} else {
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/* Get BIOS pre-defined epp value */
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epp = amd_pstate_get_epp(cpudata, value);
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if (epp)
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goto skip_epp;
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/* Get BIOS pre-defined epp value */
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epp = amd_pstate_get_epp(cpudata, value);
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if (epp < 0) {
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/**
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* This return value can only be negative for shared_memory
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* systems where EPP register read/write not supported.
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*/
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goto skip_epp;
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}
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if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
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epp = 0;
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/* Set initial EPP value */
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if (boot_cpu_has(X86_FEATURE_CPPC)) {
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value &= ~GENMASK_ULL(31, 24);
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value |= (u64)epp << 24;
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}
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WRITE_ONCE(cpudata->cppc_req_cached, value);
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amd_pstate_set_epp(cpudata, epp);
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skip_epp:
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WRITE_ONCE(cpudata->cppc_req_cached, value);
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cpufreq_cpu_put(policy);
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}
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