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arm64: dts: toshiba: Fix pl011 and pl022 clocks

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Arm Primecell blocks have a functional clock and a bus clock. The
Toshiba TMPV7708 only defines the bus clock (apb_pclk). Add the
"uartclk" and "sspclk" clocks to the PL011 and PL022 nodes,
respectively.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240826183848.1290957-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring 2024-08-26 13:38:48 -05:00 committed by Arnd Bergmann
parent 4f6dc10b7e
commit 6e7fd890f1
No known key found for this signature in database
GPG Key ID: 60AB47FFC9095227
1 changed files with 22 additions and 22 deletions
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44
arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
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@ -196,8 +196,8 @@
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
clocks = <&pismu TMPV770X_CLK_PIUART0>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PIUART0>, <&pismu TMPV770X_CLK_PIUART0>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
@ -207,8 +207,8 @@
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
clocks = <&pismu TMPV770X_CLK_PIUART1>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PIUART1>, <&pismu TMPV770X_CLK_PIUART1>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
@ -218,8 +218,8 @@
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
clocks = <&pismu TMPV770X_CLK_PIUART2>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PIUART2>, <&pismu TMPV770X_CLK_PIUART2>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
@ -229,8 +229,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
clocks = <&pismu TMPV770X_CLK_PIUART2>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PIUART2>, <&pismu TMPV770X_CLK_PIUART2>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
@ -360,8 +360,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI1>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI1>, <&pismu TMPV770X_CLK_PISPI1>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -374,8 +374,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI1>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI1>, <&pismu TMPV770X_CLK_PISPI1>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -388,8 +388,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI2>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI2>, <&pismu TMPV770X_CLK_PISPI2>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -402,8 +402,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI3>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI3>, <&pismu TMPV770X_CLK_PISPI3>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -416,8 +416,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI4>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI4>, <&pismu TMPV770X_CLK_PISPI4>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -430,8 +430,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI5>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI5>, <&pismu TMPV770X_CLK_PISPI5>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};
@ -444,8 +444,8 @@
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pismu TMPV770X_CLK_PISPI6>;
clock-names = "apb_pclk";
clocks = <&pismu TMPV770X_CLK_PISPI6>, <&pismu TMPV770X_CLK_PISPI6>;
clock-names = "sspclk", "apb_pclk";
status = "disabled";
};