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scsi: ufs: core: Probe for EXT_IID support

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Task Tag is limited to 8 bits and this restricts the number of active I/Os
to 255.  In multi-circular queue mode, this may not be enough.  The
specification provides EXT_IID which can be used to increase the number of
I/Os if the UFS device and UFSHC support it.  This patch adds support to
probe for EXT_IID support in UFS device and UFSHC.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Asutosh Das 2023-01-13 12:48:38 -08:00 committed by Martin K. Petersen
parent 64b6deadc9
commit 6e1d850acf
4 changed files with 48 additions and 0 deletions
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32
drivers/ufs/core/ufshcd.c
View File

@ -2261,6 +2261,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
if (err)
dev_err(hba->dev, "crypto setup failed\n");
hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP);
hba->ext_iid_sup = FIELD_GET(MASK_EXT_IID_SUPPORT,
hba->mcq_capabilities);
return err;
}
@ -7766,6 +7770,31 @@ static void ufshcd_temp_notif_probe(struct ufs_hba *hba, const u8 *desc_buf)
}
}
static void ufshcd_ext_iid_probe(struct ufs_hba *hba, u8 *desc_buf)
{
struct ufs_dev_info *dev_info = &hba->dev_info;
u32 ext_ufs_feature;
u32 ext_iid_en = 0;
int err;
/* Only UFS-4.0 and above may support EXT_IID */
if (dev_info->wspecversion < 0x400)
goto out;
ext_ufs_feature = get_unaligned_be32(desc_buf +
DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
if (!(ext_ufs_feature & UFS_DEV_EXT_IID_SUP))
goto out;
err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
QUERY_ATTR_IDN_EXT_IID_EN, 0, 0, &ext_iid_en);
if (err)
dev_err(hba->dev, "failed reading bEXTIIDEn. err = %d\n", err);
out:
dev_info->b_ext_iid_en = ext_iid_en;
}
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba,
const struct ufs_dev_quirk *fixups)
{
@ -7864,6 +7893,9 @@ static int ufs_get_device_desc(struct ufs_hba *hba)
ufshcd_temp_notif_probe(hba, desc_buf);
if (hba->ext_iid_sup)
ufshcd_ext_iid_probe(hba, desc_buf);
/*
* ufshcd_read_string_desc returns size of the string
* reset the error value

5
include/ufs/ufs.h
View File

@ -169,6 +169,7 @@ enum attr_idn {
QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
QUERY_ATTR_IDN_EXT_IID_EN = 0x2A,
};
/* Descriptor idn for Query requests */
@ -378,6 +379,7 @@ enum {
UFS_DEV_EXT_TEMP_NOTIF = BIT(6),
UFS_DEV_HPB_SUPPORT = BIT(7),
UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
UFS_DEV_EXT_IID_SUP = BIT(16),
};
#define UFS_DEV_HPB_SUPPORT_VERSION 0x310
@ -629,6 +631,9 @@ struct ufs_dev_info {
u8 b_presrv_uspc_en;
bool b_advanced_rpmb_en;
/* UFS EXT_IID Enable */
bool b_ext_iid_en;
};
/*

4
include/ufs/ufshcd.h
View File

@ -757,6 +757,7 @@ struct ufs_hba_monitor {
* @outstanding_lock: Protects @outstanding_reqs.
* @outstanding_reqs: Bits representing outstanding transfer requests
* @capabilities: UFS Controller Capabilities
* @mcq_capabilities: UFS Multi Circular Queue capabilities
* @nutrs: Transfer Request Queue depth supported by controller
* @nutmrs: Task Management Queue depth supported by controller
* @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
@ -841,6 +842,7 @@ struct ufs_hba_monitor {
* device
* @complete_put: whether or not to call ufshcd_rpm_put() from inside
* ufshcd_resume_complete()
* @ext_iid_sup: is EXT_IID is supported by UFSHC
*/
struct ufs_hba {
void __iomem *mmio_base;
@ -882,6 +884,7 @@ struct ufs_hba {
u32 capabilities;
int nutrs;
u32 mcq_capabilities;
int nutmrs;
u32 reserved_slot;
u32 ufs_version;
@ -991,6 +994,7 @@ struct ufs_hba {
#endif
u32 luns_avail;
bool complete_put;
bool ext_iid_sup;
};
#ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE

7
include/ufs/ufshci.h
View File

@ -22,6 +22,7 @@ enum {
/* UFSHCI Registers */
enum {
REG_CONTROLLER_CAPABILITIES = 0x00,
REG_MCQCAP = 0x04,
REG_UFS_VERSION = 0x08,
REG_CONTROLLER_DEV_ID = 0x10,
REG_CONTROLLER_PROD_ID = 0x14,
@ -69,6 +70,12 @@ enum {
MASK_OUT_OF_ORDER_DATA_DELIVERY_SUPPORT = 0x02000000,
MASK_UIC_DME_TEST_MODE_SUPPORT = 0x04000000,
MASK_CRYPTO_SUPPORT = 0x10000000,
MASK_MCQ_SUPPORT = 0x40000000,
};
/* MCQ capability mask */
enum {
MASK_EXT_IID_SUPPORT = 0x00000400,
};
#define UFS_MASK(mask, offset) ((mask) << (offset))