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powerpc/32: Pass device tree address as u64 to machine_init
u64 is used rather than phys_addr_t to keep things simple, as this is called from assembly code. Update callers to pass a 64-bit address in r3/r4. Other unused register assignments that were once parameters to machine_init are dropped. For FSL BookE, look up the physical address of the device tree from the effective address passed in r3 by the loader. This is required for situations where memory does not start at zero (due to AMP or IOMMU-less virtualization), and thus the IMA doesn't start at zero, and thus the device tree effective address does not equal the physical address. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -139,8 +139,7 @@ __start:
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trap
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#endif /* CONFIG_PPC_PMAC */
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1: mr r31,r3 /* save parameters */
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mr r30,r4
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1: mr r31,r3 /* save device tree ptr */
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li r24,0 /* cpu # */
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/*
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@ -964,8 +963,8 @@ start_here:
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* Do early platform-specific initialization,
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* and set up the MMU.
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*/
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mr r3,r31
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mr r4,r30
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li r3,0
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mr r4,r31
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bl machine_init
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bl __save_cpu_setup
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bl MMU_init
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@ -58,13 +58,7 @@
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_ENTRY(_stext);
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_ENTRY(_start);
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/* Save parameters we are passed.
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*/
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mr r31,r3
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mr r30,r4
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mr r29,r5
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mr r28,r6
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mr r27,r7
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mr r31,r3 /* save device tree ptr */
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/* We have to turn on the MMU right away so we get cache modes
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* set correctly.
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@ -849,11 +843,8 @@ start_here:
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/*
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* Decide what sort of machine this is and initialize the MMU.
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*/
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mr r3,r31
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mr r4,r30
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mr r5,r29
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mr r6,r28
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mr r7,r27
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li r3,0
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mr r4,r31
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bl machine_init
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bl MMU_init
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@ -61,14 +61,7 @@ _ENTRY(_start);
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* of abatron_pteptrs
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*/
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nop
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/*
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* Save parameters we are passed
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*/
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mr r31,r3
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mr r30,r4
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mr r29,r5
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mr r28,r6
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mr r27,r7
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mr r31,r3 /* save device tree ptr */
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li r24,0 /* CPU number */
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bl init_cpu_state
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@ -120,11 +113,8 @@ _ENTRY(_start);
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/*
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* Decide what sort of machine this is and initialize the MMU.
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*/
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mr r3,r31
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mr r4,r30
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mr r5,r29
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mr r6,r28
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mr r7,r27
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li r3,0
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mr r4,r31
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bl machine_init
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bl MMU_init
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@ -76,11 +76,7 @@ _ENTRY(_start);
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*/
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.globl __start
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__start:
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mr r31,r3 /* save parameters */
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mr r30,r4
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mr r29,r5
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mr r28,r6
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mr r27,r7
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mr r31,r3 /* save device tree ptr */
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/* We have to turn on the MMU right away so we get cache modes
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* set correctly.
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@ -723,11 +719,8 @@ start_here:
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/*
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* Decide what sort of machine this is and initialize the MMU.
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*/
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mr r3,r31
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mr r4,r30
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mr r5,r29
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mr r6,r28
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mr r7,r27
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li r3,0
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mr r4,r31
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bl machine_init
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bl MMU_init
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@ -63,17 +63,30 @@ _ENTRY(_start);
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* of abatron_pteptrs
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*/
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nop
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/*
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* Save parameters we are passed
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*/
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mr r31,r3
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mr r30,r4
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mr r29,r5
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mr r28,r6
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mr r27,r7
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li r25,0 /* phys kernel start (low) */
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li r24,0 /* CPU number */
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li r23,0 /* phys kernel start (high) */
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/* Translate device tree address to physical, save in r30/r31 */
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mfmsr r16
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mfspr r17,SPRN_PID
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rlwinm r17,r17,16,0x3fff0000 /* turn PID into MAS6[SPID] */
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rlwimi r17,r16,28,0x00000001 /* turn MSR[DS] into MAS6[SAS] */
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mtspr SPRN_MAS6,r17
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tlbsx 0,r3 /* must succeed */
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mfspr r16,SPRN_MAS1
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mfspr r20,SPRN_MAS3
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rlwinm r17,r16,25,0x1f /* r17 = log2(page size) */
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li r18,1024
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slw r18,r18,r17 /* r18 = page size */
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addi r18,r18,-1
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and r19,r3,r18 /* r19 = page offset */
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andc r31,r20,r18 /* r3 = page base */
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or r31,r31,r19 /* r3 = devtree phys addr */
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mfspr r30,SPRN_MAS7
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li r25,0 /* phys kernel start (low) */
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li r24,0 /* CPU number */
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li r23,0 /* phys kernel start (high) */
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/* We try to not make any assumptions about how the boot loader
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* setup or used the TLBs. We invalidate all mappings from the
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@ -198,11 +211,8 @@ _ENTRY(__early_start)
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/*
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* Decide what sort of machine this is and initialize the MMU.
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*/
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mr r3,r31
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mr r4,r30
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mr r5,r29
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mr r6,r28
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mr r7,r27
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mr r3,r30
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mr r4,r31
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bl machine_init
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bl MMU_init
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@ -117,7 +117,7 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
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* This is called very early on the boot process, after a minimal
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* MMU environment has been set up but before MMU_init is called.
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*/
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notrace void __init machine_init(unsigned long dt_ptr)
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notrace void __init machine_init(u64 dt_ptr)
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{
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lockdep_init();
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