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esp6: Use high-order sequence number bits for IV generation
I noticed we were only using the low-order bits for IV generation when ESN is enabled. This is very bad because it means that the IV can repeat. We must use the full 64 bits. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
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@ -248,7 +248,8 @@ static int esp6_output(struct xfrm_state *x, struct sk_buff *skb)
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aead_givcrypt_set_crypt(req, sg, sg, clen, iv);
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aead_givcrypt_set_assoc(req, asg, assoclen);
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aead_givcrypt_set_giv(req, esph->enc_data,
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XFRM_SKB_CB(skb)->seq.output.low);
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XFRM_SKB_CB(skb)->seq.output.low +
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((u64)XFRM_SKB_CB(skb)->seq.output.hi << 32));
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ESP_SKB_CB(skb)->tmp = tmp;
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err = crypto_aead_givencrypt(req);
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